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SN74LVCH322244AKR

Part # SN74LVCH322244AKR
Description IC BUFF/DVR TRI-ST 32BIT 96LFBGA
Category IC
Availability In Stock
Qty 47
Qty Price
1 - 9 $4.93277
10 - 19 $3.92380
20 - 29 $3.69958
30 - 39 $3.43799
40 + $3.06430
Manufacturer Available Qty
Texas Instruments
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Texas Instruments
Date Code: 0948
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

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FEATURES
DESCRIPTION/ORDERING INFORMATION
SN74LVCH322244A
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES405B JULY 2002 REVISED APRIL 2005
I
off
Supports Partial-Power-Down Mode
Operation
Member of the Texas Instruments Widebus+™
Family Supports Mixed-Mode Signal Operation
On All Ports (5-V Input/Output Voltage With
Operates From 1.65 V to 3.6 V
3.3-V V
CC
)
Inputs Accept Voltages to 5.5 V
Bus Hold on Data Inputs Eliminates the
Max t
pd
of 4.4 ns at 3.3 V
Need for External Pullup/Pulldown
Output Ports Have Equivalent 26- Series
Resistors
Resistors, So No External Resistors Are
Latch-Up Performance Exceeds 100 mA
Required
Per JESD 78, Class II
Typical V
OLP
(Output Ground Bounce)
ESD Protection Exceeds JESD 22
< 0.8 V at V
CC
= 3.3 V, T
A
= 25°C
2000-V Human-Body Model (A114-A)
Typical V
OHV
(Output V
OH
Undershoot)
200-V Machine Model (A115-A)
> 2 V at V
CC
= 3.3 V, T
A
= 25°C
1000-V Charged-Device Model (C101)
This 32-bit buffer/driver is designed for 1.65-V to 3.6-V V
CC
operation.
The SN74LVCH322244A is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It
provides true outputs and symmetrical active-low output-enable ( OE) inputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and
undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
LFBGA GKE SN74LVCH322244AKR
–40°C to 85°C Tape and reel CG244A
LFBGA ZKE (Pb-free) 74LVCH322244AZKER
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(EACH 4-BIT BUFFER)
INPUTS
OUTPUT
Y
OE A
L H H
L L L
H X Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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GKE OR ZKE PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
21 3 4 65
P
N
M
L
K
T
R
SN74LVCH322244A
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES405B JULY 2002 REVISED APRIL 2005
TERMINAL ASSIGNMENTS
1 2 3 4 5 6
A 1Y2 1Y1 1 OE 2 OE 1A1 1A2
B 1Y4 1Y3 GND GND 1A3 1A4
C 2Y2 2Y1 V
CC
V
CC
2A1 2A2
D 2Y4 2Y3 GND GND 2A3 2A4
E 3Y2 3Y1 GND GND 3A1 3A2
F 3Y4 3Y3 V
CC
V
CC
3A3 3A4
G 4Y2 4Y1 GND GND 4A1 4A2
H 4Y3 4Y4 4 OE 3 OE 4A4 4A3
J 5Y2 5Y1 5 OE 6 OE 5A1 5A2
K 5Y4 5Y3 GND GND 5A3 5A4
L 6Y2 6Y1 V
CC
V
CC
6A1 6A2
M 6Y4 6Y3 GND GND 6A3 6A4
N 7Y2 7Y1 GND GND 7A1 7A2
P 7Y4 7Y3 V
CC
V
CC
7A3 7A4
R 8Y2 8Y1 GND GND 8A1 8A2
T 8Y3 8Y4 8 OE 7 OE 8A4 8A3
2
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1OE
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
A3
A5
A6
B5
B6
A2
A1
B2
B1
2OE
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
A4
C5
C6
D5
D6
C2
C1
D2
D1
3OE
3A1
3A2
3A3
3A4
3Y1
3Y2
3Y3
3Y4
H4
E5
E6
F5
F6
E2
E1
F2
F1
4OE
4A1
4A2
4A3
4A4
4Y1
4Y2
4Y3
4Y4
H3
G5
G6
H6
H5
G2
G1
H1
H2
5OE
5A1
5A2
5A3
5A4
5Y1
5Y2
5Y3
5Y4
J3
J5
J6
K5
K6
J2
J1
K2
K1
6OE
6A1
6A2
6A3
6A4
6Y1
6Y2
6Y3
6Y4
J4
L5
L6
M5
M6
L2
L1
M2
M1
7OE
7A1
7A2
7A3
7A4
7Y1
7Y2
7Y3
7Y4
T4
N5
N6
P5
P6
N2
N1
P2
P1
8OE
8A1
8A2
8A3
8A4
8Y1
8Y2
8Y3
8Y4
T3
R5
R6
T6
T5
R2
R1
T1
T2
SN74LVCH322244A
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES405B JULY 2002 REVISED APRIL 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
3
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