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SN74LVC16245ADGVR

Part # SN74LVC16245ADGVR
Description Bus XCVR Dual 16-CH 3-ST 48-Pin TVSOP T/R - Tape and Reel
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.


  
  
SCES062N − DECEMBER 1995 − REVISED DECEMBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus Family
D Operates From 1.65 V to 3.6 V
D Inputs Accept Voltages to 5.5 V
D Max t
pd
of 4 ns at 3.3 V
D Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25°C
D Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25°C
D Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
D I
off
Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit (dual-octal) noninverting bus
transceiver is designed for 1.65-V to 3.6-V V
CC
operation.
The SN74LVC16245A is designed for asynchronous communication between data buses. The control-function
implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE
) input can be used to disable the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE
should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP − DL
Tube SN74LVC16245ADL
LVC16245A
SSOP − DL
Tape and reel SN74LVC16245ADLR
LVC16245A
−40°C to 85°C
TSSOP − DGG Tape and reel SN74LVC16245ADGGR LVC16245A
−40°C to 85°C
TVSOP − DGV Tape and reel SN74LVC16245ADGVR LD245A
VFBGA − GQL
Tape and reel
SN74LVC16245AGQLR
LD245A
VFBGA − ZQL (Pb-free)
Tape and reel
SN74LVC16245AZQLR
LD245A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CC
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE

  
  
SCES062N − DECEMBER 1995 − REVISED DECEMBER 2003
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator
in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
terminal assignments
123456
A 1DIR NC NC NC NC 1OE
B 1B2 1B1 GND GND 1A1 1A2
C 1B4 1B3 V
CC
V
CC
1A3 1A4
D 1B6 1B5 GND GND 1A5 1A6
E 1B8 1B7 1A7 1A8
F 2B1 2B2 2A2 2A1
G 2B3 2B4 GND GND 2A4 2A3
H 2B5 2B6 V
CC
V
CC
2A6 2A5
J 2B7 2B8 GND GND 2A8 2A7
K 2DIR NC NC NC NC 2OE
NC − No internal connection
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE DIR
OPERATION
L L B data to A bus
L H A data to B bus
H X Isolation
logic diagram (positive logic)
To Seven Other Channels
1DIR
1A1
1B1
1OE
To Seven Other Channels
2DIR
2A1
2B1
2OE
1
47
24
36
48
2
25
13
Pin numbers shown are for the DGG, DGV, and DL packages.
GQL OR ZQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
213465
K

  
  
SCES062N − DECEMBER 1995 − REVISED DECEMBER 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
−0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) −0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1) −0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2) −0.5 V to V
CC
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through each V
CC
or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 3): DGG package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 63°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GQL/ZQL package 42°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of V
CC
is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
MIN MAX UNIT
V
CC
Supply voltage
Operating 1.65 3.6
V
CC
Supply voltage
Data retention only
1.5
V
V
CC
= 1.65 V to 1.95 V 0.65 × V
CC
V
IH
High-level input voltage
V
CC
= 2.3 V to 2.7 V
1.7
V
V
IH
High-level input voltage
V
CC
= 2.7 V to 3.6 V 2
V
CC
= 1.65 V to 1.95 V 0.35 × V
CC
V
IL
Low-level input voltage
V
CC
= 2.3 V to 2.7 V
0.7
V
V
IL
Low-level input voltage
V
CC
= 2.7 V to 3.6 V 0.8
V
I
Input voltage 0 5.5 V
V
O
Output voltage
High or low state 0 V
CC
V
O
Output voltage
3-state
0 5.5
V
V
CC
= 1.65 V −4
I
OH
High-level output current
V
CC
= 2.3 V −8
I
OH
High-level output current
V
CC
= 2.7 V
−12
mA
V
CC
= 3 V −24
V
CC
= 1.65 V 4
I
OL
Low-level output current
V
CC
= 2.3 V 8
I
OL
Low-level output current
V
CC
= 2.7 V
12
mA
V
CC
= 3 V 24
t/v Input transition rise or fall rate 5 ns/V
T
A
Operating free-air temperature −40 85 °C
NOTE 4: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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