SN74LV244APWR

Cross Number:

Item Description: OCTAL BUFFER/LINE DRIVER W/ 3-STATE
Additional Information:

Qty Price
1 + $0.23830





Related Items

Texas Instruments
IC

SN74L04J

$0.16500
Texas Instruments
IC

SN74L10N

$0.16500
Texas Instruments
IC

SN74L121N

$0.76000
Texas Instruments
IC

SN74L192N

$1.00000
Texas Instruments
IC

SN74L193N

$0.16500
Texas Instruments
IC

SN74L2279AN

$0.16500


Manufacturer Date Code Qty Available Qty
Texas Instruments
  • Freelance Stock: 10
    Ships Immediately







Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

 
 
  
SCLS383L − SEPTEMBER 1997 − REVISED APRIL 2005
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D 2-V to 5.5-V V
CC
Operation
D Max t
pd
of 6.5 ns at 5 V
D Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25°C
D Typical V
OHV
(Output V
OH
Undershoot)
>2.3 V at V
CC
= 3.3 V, T
A
= 25°C
D Support Mixed-Mode Voltage Operation on
All Ports
D I
off
Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54LV244A ...J OR W PACKAGE
SN74LV244A . . . DB, DGV, DW, NS
OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
SN54LV244A . . . FK PACKAGE
(TOP VIEW)
2Y4
1A1
1OE
1Y4
2A2 2OE
2Y1
GND
2A1
V
CC
SN74LV244A . . . RGY PACKAGE
(TOP VIEW)
120
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
1OE
2A1
V
GND
CC
description/ordering information
These octal buffers/line drivers are designed for 2-V to 5.5-V V
CC
operation.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY Reel of 1000 SN74LV244ARGYR LV244A
SOIC − DW
Tube of 25 SN74LV244ADW
LV244A
SOIC − DW
Reel of 2000 SN74LV244ADWR
LV244A
SOP − NS Reel of 2000 SN74LV244ANSR 74LV244A
−40°C to 85°C
SSOP − DB Reel of 2000 SN74LV244ADBR LV244A
−40 C to 85 C
Tube of 70 SN74LV244APW
TSSOP − PW
Reel of 2000 SN74LV244APWR
LV244A
TSSOP − PW
Reel of 250 SN74LV244APWT
LV244A
TVSOP − DGV Reel of 2000 SN74LV244ADGVR LV244A
CDIP − J Tube of 20 SNJ54LV244AJ SNJ54LV244AJ
−55°C to 125°C
CFP − W Tube of 85 SNJ54LV244AW SNJ54LV244AW
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54LV244AFK SNJ54LV244AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright 2005, Texas Instruments Incorporated
    !"#$%& "!&'& 
 &(!)$'!& "#))%& ' !( *#+,"'!& '%- )!#" "!&(!)$ !
*%"("'!& *%) % %)$ !( %.' &)#$%& '&') /'))'&0-
)!#"!& *)!"%&1 !% &! &%"%'),0 &",#% %&1 !( ',,
*')'$%%)-
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
 
 
  
SCLS383L − SEPTEMBER 1997 − REVISED APRIL 2005
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
TheLV244A devices are designed specifically to improve both the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
These devices are organized as two 4-bit line drivers with separate output-enable (OE
) inputs. When OE is low,
the device passes data from the A inputs to the Y outputs. When OE
is high, the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE
should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE A
OUTPUT
Y
L H H
L LL
H X Z
logic diagram (positive logic)
1
218
1Y1
1OE
1A1
416
1Y2
1A2
614
1Y3
1A3
812
1Y4
1A4
19
11 9
2Y1
2OE
2A1
13 7
2Y2
2A2
15 5
2Y3
2A3
17 3
2Y4
2A4
 
 
  
SCLS383L − SEPTEMBER 1997 − REVISED APRIL 2005
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
−0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or
power-off state, V
O
(see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range applied in the high or low state, V
O
(see Notes 1 and 2) −0.5 V to V
CC
+ 0.5 V. . . . . .
Input clamp current, I
IK
(V
I
< 0) −20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 3): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DGV package 92°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 4): RGY package 37°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
123456NEXT

Freelance Electronics
13197 Sandoval Street
Santa Fe Springs, CA 90670

Hours of Operation  (Holiday Hours)
Monday-Friday 7:30am-4:30pm PST
(Deadline for next day shipment 2:00pm PST)

Trustworthy Standards Serving the Electronic Components
Industry since 1986

Government Cage code#-1V4R6
Duns Number# 788130532
Certified Small Disadvantaged Business