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SN74LS253N

Part # SN74LS253N
Description Multiplexer 1-Element Bipolar3-ST 8-IN 16-Pin PDIP Tube -
Category IC
Availability In Stock
Qty 45
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1 + $0.47137
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Texas Instruments
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Texas Instruments
Date Code: 8300
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

5-416
FAST AND LS TTL DATA
DUAL 4-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
The LSTTL/MSI SN54/74LS253 is a Dual 4-Input Multiplexer with 3-state
outputs. It can select two bits of data from four sources using common select
inputs. The outputs may be individually switched to a high impedance state
with a HIGH on the respective Output Enable (E
0
) inputs, allowing the outputs
to interface directly with bus oriented systems. It is fabricated with the
Schottky barrier diode process for high speed and is completely compatible
with all Motorola TTL families.
Schottky Process for High Speed
Multifunction Capability
Non-Inverting 3-State Outputs
Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
PIN NAMES LOADING (Note a)
HIGH LOW
S
0
, S
1
Common Select Inputs 0.5 U.L. 0.25 U.L.
Multiplexer A
E
0a
Output Enable (Active LOW) Input 0.5 U.L. 0.25 U.L.
I
0a
I
3a
Multiplexer Inputs 0.5 U.L. 0.25 U.L.
Z
a
Multiplexer Output (Note b) 65 (25) U.L. 15 (7.5) U.L.
Multiplexer B
E
0b
Output Enable (Active LOW) Input 0.5 U.L. 0.25 U.L.
I
0b
I
3b
Multiplexer Inputs 0.5 U.L. 0.25 U.L.
Z
b
Multiplexer Output (Note b) 65 (25) U.L. 15 (7.5) U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 7.5 U.L. for Military (54) and 15 U.L. for Commercial (74)
Temperature Ranges. The Output HIGH drive factor is 25 U.L. for Military (54) and 65 U.L. for
Commercial (74) Temperature Ranges.
SN54/74LS253
DUAL 4-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
LOW POWER SCHOTTKY
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
16
1
D SUFFIX
SOIC
CASE 751B-03
LOGIC SYMBOL
5-417
FAST AND LS TTL DATA
SN54/74LS253
LOGIC DIAGRAM
FUNCTIONAL DESCRIPTION
The LS253 contains two identical 4-Input Multiplexers with
3-state outputs. They select two bits from four sources
selected by common select inputs (S
0
, S
1
). The 4-input
multiplexers have individual Output Enable (E
0a
, E
0b
) inputs
which when HIGH, forces the outputs to a high impedance
(high Z) state.
The LS253 is the logic implementation of a 2-pole,
4-position switch, where the position of the switch is deter-
mined by the logic levels supplied to the two select inputs. The
logic equations for the outputs are shown below:
Z
a
= E
0a
(I
0a
S
1
S
0
+ I
1a
S
1
S
0
I
2a
S
1
S
0
+ I
3a
S
1
S
0
)
Z
b
= E
0b
(I
0b
S
1
S
0
+ I
1b
S
1
S
0
I
2b
S
1
S
0
+ I
3b
S
1
S
0
)
If the outputs of 3-state devices are tied together, all but one
device must be in the high impedance state to avoid high
currents that would exceed the maximum ratings. Designers
should ensure that Output Enable signals to 3-state devices
whose outputs are tied together are designed so that there is
no overlap.
TRUTH TABLE
SELECT
INPUTS
DATA INPUTS
OUTPUT
ENABLE
OUTPUT
S
0
S
1
I
0
I
1
I
2
I
3
E
0
Z
X X X X X X H (Z)
L L L X X X L L
L L H X X X L H
H L X L X X L L
H L X H X X L H
L H X X L X L L
L H X X H X L H
H H X X X L L L
H H X X X H L H
H = HIGH Level
L = LOW Level
X = Irrelevant
(Z) = High Impedance (off)
Address inputs S
0
and S
1
are common to both sections.
5-418
FAST AND LS TTL DATA
SN54/74LS253
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage 54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
T
A
Operating Ambient Temperature Range 54
74
55
0
25
25
125
70
°C
I
OH
Output Current — High 54
74
1.0
2.6
mA
I
OL
Output Current — Low 54
74
12
24
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
V
IH
Input HIGH Voltage 2.0 V
Guaranteed Input HIGH Voltage for
All Inputs
V
IL
Input LOW Voltage
54 0.7
V
Guaranteed Input LOW Voltage for
All Inputs
V
IL
Input LOW Voltage
74 0.8
V
Guaranteed Input LOW Voltage for
All Inputs
V
IK
Input Clamp Diode Voltage 0.65 1.5 V V
CC
= MIN, I
IN
= –18 mA
V
OH
Output HIGH Voltage
54 2.4 3.4 V
V
CC
= MIN, I
OH
= MAX, V
IN
= V
IH
or V
IL
per Truth Table
V
OH
Output HIGH Voltage
74 2.4 3.1 V
V
CC
= MIN, I
OH
= MAX, V
IN
= V
IH
or V
IL
per Truth Table
V
OL
Output LOW Voltage
54, 74 0.25 0.4 V I
OL
= 12 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
V
OL
Output LOW Voltage
74 0.35 0.5 V I
OL
= 24 mA
V
IN
= V
IL
or V
IH
per Truth Table
I
OZH
Output Off Current HIGH 20 µA V
CC
= MAX, V
OUT
= 2.7 V
I
OZL
Output Off Current LOW 20 µA V
CC
= MAX, V
OUT
= 0.4 V
I
IH
Input HIGH Current
20 µA V
CC
= MAX, V
IN
= 2.7 V
I
IH
Input HIGH Current
0.1 mA V
CC
= MAX, V
IN
= 7.0 V
I
IL
Input LOW Current 0.4 mA V
CC
= MAX, V
IN
= 0.4 V
I
OS
Short Circuit Current (Note 1) 30 130 mA V
CC
= MAX
I
CC
Power Supply Current
12 mA V
CC
= MAX, V
E
= 0 V
I
CC
Power Supply Current
14
mA V
CC
= MAX, V
E
= 4.5 V
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T
A
= 25°C, V
CC
= 5.0 V) See SN54LS251 for Waveforms
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
t
PLH
t
PHL
Propagation Delay,
Data to Output
17
13
25
20
ns Figure 1
t
PLH
t
PHL
Propagation Delay,
Select to Output
30
21
45
32
ns Figure 1
C
L
= 45 pF,
R
L
= 667
t
PZH
t
PZL
Output Enable Time
15
15
28
23
ns Figures 4, 5
t
PHZ
t
PLZ
Output Disable Time
27
18
41
27
ns Figures 3, 5
C
L
= 5.0 pF,
R
L
= 667
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