Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

SN74BCT374N

Part # SN74BCT374N
Description Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-
Category IC
Availability In Stock
Qty 46
Qty Price
1 - 9 $2.66966
10 - 19 $2.12359
20 - 28 $2.00225
29 - 38 $1.86067
39 + $1.65843
Manufacturer Available Qty
Texas Instruments
  • Shipping Freelance Stock: 23
    Ships Immediately
Texas Instruments
Date Code: 8931
  • Shipping Freelance Stock: 4
    Ships Immediately
Texas Instruments
Date Code: 9013
  • Shipping Freelance Stock: 19
    Ships Immediately



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C – SEPTEMBER 1988 – REVISED MARCH 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Operating Voltage Range of 4.5 V to 5.5 V
State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
Full Parallel Access for Loading
Buffered Control Inputs
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
SN54BCT374 ...FK PACKAGE
(TOP VIEW)
SN54BCT374 ...J OR W PACKAGE
SN74BCT374 ... DW, N, OR NS PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D
8Q
4Q
GND
CLK
V
CC
description/ordering information
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight flip-flops of the ’BCT374 devices are edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
A buffered output-enable (OE
) input can be used to place the eight outputs in either a normal logic state (high
or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without
need for interface or pullup components. The output-enable (OE
) input does not affect internal operations of
the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance
state.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N Tube SN74BCT374N SN74BCT374N
0°Cto70°C
SOIC DW
Tube SN74BCT374DW
BCT374
0°C
to
70°C
SOIC
DW
Tape and reel SN74BCT374DWR
BCT374
SOP – NS Tape and reel SN74BCT374NSR BCT374
CDIP – J Tube SNJ54BCT374J SNJ54BCT374J
–55°C to 125°C
CFP – W Tube SNJ54BCT374W SNJ54BCT374W
LCCC – FK Tube SNJ54BCT374FK SNJ54BCT374FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C SEPTEMBER 1988 REVISED MARCH 2003
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE CLK D
Q
L H H
L LL
L H or L X Q
0
H X X Z
logic diagram (positive logic)
1D
CLK
1Q
2
11
3
1
1D
OE
C1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) 0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the disabled or power-off state, V
O
0.5 V to 5.5 V. . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state, V
O
0.5 V to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state: SN54BCT374 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74BCT374 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 2): DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN54BCT374, SN74BCT374
OCTAL EDGE-TRIGGERED D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS019C SEPTEMBER 1988 REVISED MARCH 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54BCT374 SN74BCT374
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
I
IK
Input clamp current 18 18 mA
I
OH
High-level output current 2 15 mA
I
OL
Low-level output current 48 64 mA
T
A
Operating free-air temperature 55 125 0 70 °C
NOTE 3: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54BCT374 SN74BCT374
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP
MAX MIN TYP
MAX
UNIT
V
IK
V
CC
= 4.5 V, I
I
= 18 mA 1.2 1.2 V
I
OH
= 3 mA 2.4 3.3 2.4 3.3
V
OH
V
CC
= 4.5 V
I
OH
= 12 mA 2 3.2
V
I
OH
= 15 mA 2 3.1
V
OL
V
CC
=45V
I
OL
= 48 mA 0.38 0.55
V
V
OL
V
CC
=
4
.
5
V
I
OL
= 64 mA 0.42 0.55
V
I
I
V
CC
= 5.5 V, V
I
= 5.5 V 0.4 0.4 mA
I
IH
V
CC
= 5.5 V, V
I
= 2.7 V 20 20 µA
I
IL
V
CC
= 5.5 V, V
I
= 0.5 V 0.6 0.6 mA
I
OS
V
CC
= 5.5 V, V
O
= 0 100 225 100 225 mA
I
OZH
V
CC
= 5.5 V, V
O
= 2.7 V 50 50 µA
I
OZL
V
CC
= 5.5 V, V
O
= 0.5 V 50 50 µA
I
CCL
V
CC
= 5.5 V 37 60 37 60 mA
I
CCH
V
CC
= 5.5 V 2 5 2 5 mA
I
CCZ
V
CC
= 5.5 V 5 8 5 8 mA
C
i
V
CC
= 5 V, V
I
= 2.5 V or 0.5 V 6 6 pF
C
o
V
CC
= 5 V, V
O
= 2.5 V or 0.5 V 10 10 pF
All typical values are at V
CC
= 5 V, T
A
= 25°C.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
12345NEXT