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SN74ALS994NT

Part # SN74ALS994NT
Description IC LATCH TRANSP 10BIT D 24DIP
Category IC
Availability In Stock
Qty 3
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Texas Instruments
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN74ALS994
10-BIT D-TYPE TRANSPARENT READ-BACK LATCH
SDAS237A – OCTOBER 1984 – REVISED JANUARY 1995
Copyright 1995, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• 3-State I/O-Type Read-Back Inputs
• Bus-Structured Pinout
• True Logic Outputs
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) 300-mil DIPs
description
This 10-bit latch is designed specifically for storing
the contents of the input data bus and providing
the capability of reading back the stored data onto
the input data bus.
The ten latches are transparent D-type latches.
While the latch-enable (LE) input is high, the
Q outputs follow the data (D) inputs.
Read back is provided through the output-enable (OERB
) input. When OERB is taken low, the data present at
the output of the data latches passes back onto the input data bus. When OERB
is taken high, the output of the
data latches is isolated from the D inputs. OERB
does not affect the internal operation of the latches; however,
precautions should be taken to avoid a bus conflict.
The SN74ALS994 is characterized for operation from 0°C to 70°C.
logic symbol
†
6D
7
7D
8
8D
9
5Q
19
6Q
18
7Q
17
8Q
16
9D
10
9Q
15
10D
11
10Q
14
C1
13
LE
2D
3
3D
4
4D
5
5D
6
2Q
22
3Q
21
4Q
20
1Q
23
1D
2
1D
EN2
1
OERB
2
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
DW OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OERB
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
LE
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74ALS994
10-BIT D-TYPE TRANSPARENT READ-BACK LATCH
SDAS237A – OCTOBER 1984 – REVISED JANUARY 1995
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
1D
C1
To Nine Other Channels
1
13
223
OERB
LE
1D
1Q
timing diagram
Data Bus
LE
OERB
Q
t
su
t
h
t
pd
t
dis
Input Data Read Back Input Data
t
pd
t
su
†
†
This setup time ensures that the read-back circuit will not create a conflict on the input data bus.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
(OERB and LE) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to D inputs 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SN74ALS994
10-BIT D-TYPE TRANSPARENT READ-BACK LATCH
SDAS237A – OCTOBER 1984 – REVISED JANUARY 1995
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
V
CC
Supply voltage 4.5 5 5.5 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
I
OH
High level out
p
ut current
Q –2.6
mA
I
OH
High
-
le
v
el
o
u
tp
u
t
c
u
rrent
D –0.4
mA
I
OL
Low level out
p
ut current
Q 24
mA
I
OL
Lo
w-
le
v
el
o
u
tp
u
t
c
u
rrent
D 8
mA
t
w
Pulse duration, LE high 10 ns
t
Setu
p
time
Data before LE↓ 10
ns
t
su
Set
u
p
time
Data before OERB↓
†
10
ns
t
h
Hold time, data after LE↓ 5 ns
T
A
Operating free-air temperature 0 70 °C
†
This setup time ensures that the read-back circuit will not create a conflict on the input data bus.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
‡
MAX UNIT
V
IK
V
CC
= 4.5 V, I
I
= –18 mA –1.2 V
V
All outputs V
CC
= 4.5 V to 5.5 V, I
OH
= – 0.4 mA V
CC
–2
V
V
OH
Q
V
CC
= 4.5 V, I
OH
= – 2.6 mA 2.4 3.2
V
D
V
CC
=45V
I
OL
= 4 mA 0.25 0.4
V
OL
D
V
CC
=
4
.
5
V
I
OL
= 8 mA 0.35 0.5
V
V
OL
Q
V
CC
=45V
I
OL
= 12 mA 0.25 0.4
V
Q
V
CC
=
4
.
5
V
I
OL
= 24 mA 0.35 0.5
I
I
OERB, LE
V
CC
=55V
V
I
= 7 V 0.1
mA
I
I
D inputs
V
CC
=
5
.
5
V
V
I
= 5.5 V 0.1
mA
I
OERB, LE
V
CC
=55V
V
I
=27V
20
µA
I
IH
D inputs
§
V
CC
=
5
.
5
V
,
V
I
=
2
.
7
V
20
µ
A
I
OERB, LE
V
CC
=55V
V
I
=04V
–0.1
mA
I
IL
D inputs
§
V
CC
=
5
.
5
V
,
V
I
=
0
.
4
V
–0.1
mA
I
O
V
CC
= 5.5 V, V
O
= 2.25 V –30 –112 mA
I
CC
V
CC
= 5.5 V,
Q outputs high 30 50
mA
I
CC
CC
OERB high
Q outputs low 52 82
mA
‡
All typical values are at V
CC
= 5 V, T
A
= 25°C.
§
For I/O ports (Q
A
thru Q
H
), the parameters I
IH
and I
IL
include the off-state output current.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
OS
.
123NEXT
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