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SN74AHC1GU04DCKR

Part # SN74AHC1GU04DCKR
Description Inverter 1-Element CMOS 5-PinSC-70 T/R
Category IC
Availability In Stock
Qty 1035
Qty Price
1 - 217 $0.04592
218 - 434 $0.03653
435 - 652 $0.03444
653 - 869 $0.03201
870 + $0.02853
Manufacturer Available Qty
Texas Instruments
Date Code: 0627
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

  
SCLS343Q− APRIL 1996 − REVISED JUNE 2005
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Operating Range 2-V to 5.5-V V
CC
D Unbuffered Output
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
3
2
4
51
NC V
CC
Y
A
GND
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
51
NC V
CC
Y
A
GND
3
2
4
51
NC V
CC
Y
A
GND
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
NC – No internal connection
description/ordering information
The SN74AHC1GU04 contains a single inverter gate. The device performs the Boolean function Y = A. Internal
circuitry consists of a single-stage inverter that can be used in analog applications, such as crystal oscillators.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOT (SOT-23) − DBV
Reel of 3000 SN74AHC1GU04DBVR
AU4_
SOT (SOT-23) − DBV
Reel of 250 SN74AHC1GU04DBVT
AU4_
−40°C to 85°C
SOT (SC-70) − DCK
Reel of 3000 SN74AHC1GU04DCKR
AD_
−40 C to 85 C
SOT (SC-70) − DCK
Reel of 250 SN74AHC1GU04DCKT
AD_
SOT (SOT-553) − DRL Reel of 4000 SN74AHC1GU04DRLR AD_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUT
A
OUTPUT
Y
H L
L H
logic diagram (positive logic)
AY
24
Copyright 2005, Texas Instruments Incorporated
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  
SCLS343Q− APRIL 1996 − REVISED JUNE 2005
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
−0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1) −0.5 V to V
CC
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) −20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 2): DBV package 206°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DCK package 252°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DRL package 142°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
V
CC
Supply voltage 2 5.5 V
V
CC
= 2 V 1.7
V
IH
High-level input voltage
V
CC
= 3 V
2.4
V
V
IH
High-level input voltage
V
CC
= 5.5 V 4.4
V
V
CC
= 2 V 0.3
V
IL
Low-level input voltage
V
CC
= 3 V
0.6
V
V
IL
Low-level input voltage
V
CC
= 5.5 V 1.1
V
V
I
Input voltage 0 5.5 V
V
O
Output voltage 0 V
CC
V
V
CC
= 2 V −50 mA
I
OH
High-level output current
V
CC
= 3.3 V ± 0.3 V
−4
mA
I
OH
High-level output current
V
CC
= 5 V ± 0.5 V −8
mA
V
CC
= 2 V 50 mA
I
OL
Low-level output current
V
CC
= 3.3 V ± 0.3 V
4
mA
I
OL
Low-level output current
V
CC
= 5 V ± 0.5 V 8
mA
T
A
Operating free-air temperature −40 85 °C
NOTE 3: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

  
SCLS343Q− APRIL 1996 − REVISED JUNE 2005
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
T
A
= 25°C
MIN
MAX
UNIT
PARAMETER
TEST CONDITIONS
CC
MIN TYP MAX
MIN
MAX
UNIT
2 V 1.8 2 1.8
I
OH
= −50 mA
3 V 2.7 3 2.7
V
OH
I
OH
= −50 mA
4.5 V 4 4.5 4
V
V
OH
I
OH
= −4 mA
3 V 2.58 2.48
V
I
OH
= −8 mA
4.5 V 3.94 3.8
2 V 0.2 0.2
I
OL
= 50 mA
3 V 0.3 0.3
V
OL
I
OL
= 50 mA
4.5 V 0.5 0.5
V
V
OL
I
OL
= 4 mA
3 V 0.36 0.44
V
I
OL
= 8 mA
4.5 V 0.36 0.44
I
I
V
I
= 5.5 V or GND 0 V to 5.5 V ±0.1 ±1 mA
I
CC
V
I
= V
CC
or GND, I
O
= 0 5.5 V 1 10 mA
C
i
V
I
= V
CC
or GND 5 V 2 10 10 pF
switching characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
OUTPUT
T
A
= 25°C
MIN
MAX
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
MIN TYP MAX
MIN
MAX
UNIT
t
PLH
A
Y
C
L
15 pF
5 7.1 1 8.5
ns
t
PHL
A Y C
L
= 15 pF
5 7.1 1 8.5
ns
t
PLH
A
Y
C
L
50 pF
7.5 10.6 1 12
ns
t
PHL
A
Y
C
L
=
50 pF
7.5 10.6 1 12
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
OUTPUT
T
A
= 25°C
MIN
MAX
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
MIN TYP MAX
MIN
MAX
UNIT
t
PLH
A
Y
C
L
15 pF
3.5 5.5 1 6
ns
t
PHL
A Y C
L
= 15 pF
3.5 5.5 1 6
ns
t
PLH
A
Y
C
L
50 pF
5 7 1 8
ns
t
PHL
A
Y
C
L
=
50 pF
5 7 1 8
ns
operating characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
pd
Power dissipation capacitance No load, f = 1 MHz 7.3 pF
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