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SN65LVDS047D

Part # SN65LVDS047D
Description IC, QUAD LVDS DRIVER4 FUNC, CMOS, 16 PDSO
Category IC
Availability Out of Stock
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

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SWITCHING CHARACTERISTICS
SN65LVDS047
SLLS416B JUNE 2000 REVISED DECEMBER 2003
over recommended operating conditions (see
(1)
,
(2)
and
(3)
)(unless otherwise noted)
TYP
(
PARAMETER TEST CONDITIONS MIN MAX UNIT
4)
t
PHL
Differential propagation delay, high-to-low 1.4 1.8 2.8 ns
t
PLH
Differential propagation delay, low-to-high 1.4 1.8 2.8 ns
t
SK(p)
Differential pulse skew (t
PHLD -
t
PLHD
), see
(5)
50 300 ps
t
SK(o)
Channel-to-channel skew, see
(6)
40 300 ps
R
L
= 100 ,, C
L
= 15 pF,
see Figure 2 and Figure 3
t
SK(pp)
Differential part-to-part skew, see
(7)
1 ns
t
SK(lim)
Differential part-to-part skew, see
(8)
1.2 ns
t
r
Rise time 0.5 1.5 ns
t
f
Fall time 0.5 1.5 ns
t
PHZ
Disable time high to Z 5.5 8 ns
t
PLZ
Disable time low to Z 5.5 8 ns
R
L
= 100 ,, C
L
= 15 pF,
see Figure 4 and Figure 5
t
PZH
Enable time Z to high 8.5 12 ns
t
PZL
Enable time Z to low 8.5 12 ns
f
(MAX)
Maximum operating frequency, see
(9)
250 MHz
(1) Generator waveform for all tests unless otherwise: f = 1 MHz, Z
o
= 50 , t
r
< 1 ns, and t
f
< 1 ns.
(2) C
L
includes probe and jig capacitance.
(3) All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
(4) All typical values are given for: V
CC
= 3.3 V, T
A
= 25°C.
(5) t
SK(p)
|t
PHL
-t
PLH
| is the magnitude difference in differential propagation delay time between the positive going edge andthe negative going
edge of the same channel.
(6) t
SK(o)
is the differential channel-to-channel skew of any event on the same device.
(7) t
SK(pp)
is the differential part-to-part skew, and is defined as the difference between the minimum and the maximum specified differential
propagation delays. This specification applies to devices at the same V
CC
and within 5°C of each other within the operating temperature
range.
(8) t
SK(lim)
part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices
over recommended operating temperature and voltage ranges, and across process distribution. t
SK(lim)
is defined as|Min - Max|
differential propagation delay.
(9) f
(MAX)
generator input conditions: t
r
= t
f
< 1 ns (0% to 100%), 50% duty cycle, 0 V to 3 V. Output criteria: duty cycle = 45% to55,V
OD
>
250 mV, all channels switching
4
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PARAMETER MEASUREMENT INFORMATION
D
IN
Driver Enable
R
L
/2
R
L
/2
V
OC
D
OUT+
D
OUT
V
OD
D
S1
V
CC
GND
D
IN
Driver Enable
D
R
L
C
L
C
L
50
Generator
D
OUT+
D
OUT
80% 80%
0 V
20%
0 V
20%
t
r
t
f
0 V (Differential)
t
PLH
t
PHL
3 V
0 V
V
OH
V
OL
D
IN
D
OUT–
D
OUT+
V
(DIFF)
V
(DIFF)
= D
OUT
+ – D
OUT
0 V
1.5 V1.5 V
SN65LVDS047
SLLS416B JUNE 2000 REVISED DECEMBER 2003
Figure 1. Driver V
OD
and V
OC
Test Circuit
Figure 2. Driver Propagation Delay and Transition Time Test Circuit
Figure 3. Driver Propagation Delay and Transition Time Waveforms
5
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1.5 V 1.5 V
50% 50%
50% 50%
t
PHZ
t
PZH
t
PLZ
t
PZL
EN When EN = GND or Open
EN When EN = V
CC
D
OUT+
When D
IN
= V
CC
D
OUT
– When D
IN
= GND
D
OUT+
When D
IN
= GND
D
OUT–
When D
IN
= V
CC
3 V
0 V
3 V
0 V
1.5 V 1.5 V
V
OH
1.2 V
1.2 V
V
OL
SN65LVDS047
SLLS416B JUNE 2000 REVISED DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 4. Driver 3-State Delay Test Circuit
Figure 5. Driver 3-State Delay Waveform
6
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