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SN54ALS240AJ

Part # SN54ALS240AJ
Description OCTAL BUFFER/DRIVER - Rail/Tube
Category IC
Availability In Stock
Qty 20
Qty Price
1 - 4 $10.01786
5 - 8 $7.96875
9 - 12 $7.51340
13 - 16 $6.98215
17 + $6.22322
Manufacturer Available Qty
Texas Instruments
Date Code: 8914
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    Ships Immediately
Texas Instruments
Date Code: 8636
  • Shipping Freelance Stock: 10
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Texas Instruments
Date Code: 9044
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDAS214E – DECEMBER 1982 – REVISED AUGUST 2002
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
pnp Inputs Reduce dc Loading
description/ordering information
These octal buffers/drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. When these devices are used with
the ’ALS241, ’AS241A, ’ALS244, and ’AS244A
devices, the circuit designer has a choice of
selected combinations of inverting and
noninverting outputs, symmetrical active-low
output-enable (OE
) inputs, and complementary
OE and OE
inputs. These devices feature high
fan-out and improved fan-in.
The -1 version of SN74ALS240A is identical to the
standard version, except that the recommended
maximum I
OL
for the -1 version is 48 mA. There is
no -1 version of the SN54ALS240A.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SN74ALS240AN SN74ALS240AN
PDIP – N Tube
SN74ALS240A-1N SN74ALS240A-1N
SN74AS240AN SN74AS240AN
Tube SN74ALS240ADW
ALS240A
Tape and reel SN74ALS240ADWR
ALS240A
SOIC DW
Tube SN74ALS240A-1DW
ALS240A 1
0°C to 70°C
SOIC
DW
Tape and reel SN74ALS240A-1DWR
ALS240A
-
1
Tube SN74AS240ADW
AS240A
Tape and reel SN74AS240ADWR
AS240A
SOP NS
Ta
p
e and reel
SN74ALS240ANSR ALS240A
SOP
NS
Tape
and
reel
SN74ALS240A-1NSR ALS240A-1
SSOP DB
Ta
p
e and reel
SN74ALS240ADBR G240A
SSOP
DB
Tape
and
reel
SN74ALS240A-1DBR G240A-1
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54ALS240A, SN54AS240A ...J OR W PACKAGE
SN74ALS240A . . . DB, DW, N, OR NS PACKAGE
SN74AS240A . . . DW OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
SN54ALS240A, SN54AS240A . . . FK PACKAGE
(TOP VIEW)
2Y4
1A1
1OE
1Y4
2A2 2OE
2Y1
GND
2A1
V
CC
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDAS214E DECEMBER 1982 REVISED AUGUST 2002
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description/ordering information (continued)
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
CDIP J
Tube
SNJ54ALS240AJ SNJ54ALS240AJ
CDIP
J
Tube
SNJ54AS240AJ SNJ54AS240AJ
55°Cto125°C
CFP W
Tube
SNJ54ALS240AW SNJ54ALS240AW
55°C
to
125°C
CFP
W
Tube
SNJ54AS240AW SNJ54AS240AW
LCCC FK
Tube
SNJ54ALS240AFK SNJ54ALS240AFK
LCCC
FK
Tube
SNJ54AS240AFK SNJ54AS240AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE A
Y
L H L
L LH
H X Z
SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDAS214E DECEMBER 1982 REVISED AUGUST 2002
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic diagram (positive logic)
1
2
4
6
8
19
11
13
15
17
3
5
7
9
12
14
16
18
1A1
1A2
1A3
1A4
1Y1
2A1
2A2
2A3
2A4
2Y1
1Y2
1Y3
1Y4
2Y2
2Y3
2Y4
1OE
2OE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 1): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
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