100 S29GLxxxN MirrorBitTM Flash Family 27631A4 May 13, 2004
Advance Information
AC Characteristics
Alternate CE# Controlled Erase and Program Operations–S29GL512N Only
Notes:
1. Not 100% tested.
2. See the “AC Characteristics” section for more information.
3. For 1–16 words/1–32 bytes programmed.
4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5. Unless otherwise indicated, AC specifications for 90 ns and 100 ns speed options are tested with V
IO
= V
CC
= 3 V.
AC specifications for 100 ns and 110 ns speed options are tested with V
IO
= 1.8 V and V
CC
= 3.0 V.
Parameter Speed Options
JEDEC Std.
Description
90 100 100 110 Unit
t
AVAV
t
WC
Write Cycle Time (Note 1) Min 90 100 100 110 ns
t
AVWL
t
AS
Address Setup Time Min 0 ns
t
ELAX
t
AH
Address Hold Time Min 45 ns
t
DVEH
t
DS
Data Setup Time Min 45 ns
t
EHDX
t
DH
Data Hold Time Min 0 ns
t
GHEL
t
GHEL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min 0 ns
t
WLEL
t
WS
WE# Setup Time Min 0 ns
t
EHWH
t
WH
WE# Hold Time Min 0 ns
t
ELEH
t
CP
CE# Pulse Width Min 45 ns
t
EHEL
t
CPH
CE# Pulse Width High Min 30 ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes 2,
3)
Typ 240 µs
Effective Write Buffer
Program Operation (Notes
2, 4)
Per Word Typ 15 µs
Effective Accelerated Write
Buffer Program Operation
(Notes 2, 4)
Per Word Typ 13.5 µs
Program Operation (Note 2) Word Typ 60 µs
Accelerated Programming
Operation (Note 2)
Word Typ 54 µs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2) Typ 1.0 sec
