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S29GL256N10TFI020

Part # S29GL256N10TFI020
Description NOR Flash Parallel 3.3V 256M-bit 32M x 8/16M x 16 100ns 56
Category IC
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Date Code: 0623
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

May 13, 2004 27631A4 S29GLxxxN MirrorBitTM Flash Family 85
Advance Information
ABSOLUTE MAXIMUM RATINGS
Storage Temperature, Plastic Packages. . . . . . . . . . . . . . . . –65°C to +150°C
Ambient Temperature with Power Applied . . . . . . . . . . . . . . 65°C to +125°C
Voltage with Respect to Ground:
V
CC
(Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.5 V to +4.0 V
V
IO
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to +4.0 V
A9, OE#, ACC and RESET# (Note 2) . . . . . . . . . . . . . –0.5 V to +12.5 V
All other pins (Note 1) . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to +12.5 V
Output Short Circuit Current (Note 3)200 mA
Notes:
1. Minimum DC voltage on input or I/Os is –0.5 V. During voltage transitions, inputs
or I/Os may overshoot V
SS
to –2.0 V for periods of up to 20 ns. See Figure 7.
Maximum DC voltage on input or I/Os is V
CC
+ 0.5 V. During voltage transitions,
input or I/O pins may overshoot to V
CC
+ 2.0 V for periods up to 20 ns. See Figure
8.
2. Minimum DC input voltage on pins A9, OE#, ACC, and RESET# is –0.5 V. During
voltage transitions, A9, OE#, ACC, and RESET# may overshoot V
SS
to –2.0 V for
periods of up to 20 ns. See Figure 7. Maximum DC input voltage on pin A9, OE#,
ACC, and RESET# is +12.5 V which may overshoot to +14.0V for periods up to 20
ns.
3. No more than one output may be shorted to ground at a time. Duration of the short
circuit should not be greater than one second.
4. Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this data sheet is not implied. Exposure of the device to
absolute maximum rating conditions for extended periods may affect device
reliability.
Operating Ranges
Industrial (I) Devices
Ambient Temperature (T
A
) . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Supply Voltages
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.7 V to +3.6 V
V
IO
(Note 2) . . . . . . . . . . . . . . . . . . . +1.65 V to +1.95 V or +2.7 to + 3.6 V
Notes:
1. Operating ranges define those limits between which the functionality of the device is guaranteed.
2. See Ordering Information (256 Mb) section for valid V
CC
/V
IO
range combinations. The I/Os will not operate at 3 V
when V
IO
=1.8 V.
Figure 7. Maximum Negative
Overshoot Waveform
Figure 8. Maximum Positive
Overshoot Waveform
20 ns
20 ns
+0.8 V
–0.5 V
20 ns
–2.0 V
20 ns
20 ns
V
CC
+2.0 V
V
CC
+0.5 V
20 ns
2.0 V
86 S29GLxxxN MirrorBitTM Flash Family 27631A4 May 13, 2004
Advance Information
DC Characteristics
CMOS Compatible
Notes:
1. The I
CC
current listed is typically less than TBD mA/MHz, with OE# at V
IH
.
2. I
CC
active while Embedded Erase or Embedded Program or Write Buffer Programming is in progress.
3. Not 100% tested.
4. Automatic sleep mode enables the lower power mode when addresses remain stable tor t
ACC
+ 30 ns.
5. V
IO
= 1.65–1.95 V or 2.7–3.6 V
6. V
CC
= 3 V and V
IO
= 3V or 1.8V. When V
IO
is at 1.8V, I/O pins cannot operate at 3V.
Parameter
Symbol
Parameter Description
(Notes)
Test Conditions Min Typ Max Unit
I
LI
Input Load Current (1)
V
IN
= V
SS
to V
CC
,
V
CC
= V
CC
max
±1.0 µA
I
LIT
A9 Input Load Current V
CC
= V
CC max
; A9 = 12.5 V 35 µA
I
LO
Output Leakage Current
V
OUT
= V
SS
to V
CC
,
V
CC
= V
CC max
±1.0 µA
I
IO1
V
IO
Active Read Current
(Switching Current)
V
IO
= 1.8 V, CE# = V
IL
, OE# = V
IL
, WE# = V
IL
,
f =
5 MHz
510µA
I
IO2
V
IO
Non-Active Output CE# = V
IL,
OE# = V
IH
0.2 10 mA
I
CC1
V
CC
Active Read Current (1)
CE# = V
IL,
OE# = V
IH
, V
CC
= V
CCmax
,
f = 5 MHz, Byte Mode
25 30
mA
CE# = V
IL,
OE# = V
IH
, V
CC
= V
CCmax
,
f = 5 MHz, Word Mode
25 30
I
CC2
V
CC
Initial Page Read Current (1) CE# = V
IL,
OE# = V
IH,
V
CC
= V
CCmax
50 60 mA
I
CC3
V
CC
Intra-Page Read Current (1) CE# = V
IL,
OE# = V
IH,
V
CC
= V
CCmax
10 20 mA
I
CC4
V
CC
Active Erase/Program Current (2, 3) CE# = V
IL,
OE# = V
IH,
V
CC
= V
CCmax
50 70 mA
I
CC5
V
CC
Standby Current
CE#, RESET# = V
SS
± 0.3 V, OE# = V
IH,
V
CC
= V
CCmax
V
IL
= V
SS
+ 0.3 V/-0.1V,
15µA
I
CC6
V
CC
Reset Current
V
CC
= V
CCmax;
V
IL
= V
SS
+ 0.3 V/-0.1V,
RESET# = V
SS
± 0.3 V
15µA
I
CC7
Automatic Sleep Mode (4)
V
CC
= V
CCmax
V
IH
= V
CC
± 0.3 V,
V
IL
= V
SS
+ 0.3 V/-0.1V,
WP#/ACC = V
IH
15µA
I
ACC
ACC Accelerated Program Current
CE# = V
IL,
OE# = V
IH,
V
CC
= V
CCmax,
WP#/ACC = V
IH
WP#/ACC
pin
10 20
mA
V
CC
pin 30 60
V
IL
Input Low Voltage (5) –0.1 0.3 x V
IO
V
V
IH
Input High Voltage (5) 0.7 x V
IO
V
IO
+ 0.3
V
V
HH
Voltage for ACC Erase/Program
Acceleration
V
CC
= 2.7 –3.6 V 11.5 12.5 V
V
ID
Voltage for Autoselect and Temporary
Sector Unprotect
V
CC
= 2.7 –3.6 V 11.5 12.5 V
V
OL
Output Low Voltage (5) I
OL
= 100 µA
0.15 x
V
IO
V
V
OH
Output High Voltage (5) I
OH
= 100 µA 0.85 x V
IO
V
V
LKO
Low V
CC
Lock-Out Voltage (3) 2.3 2.5 V
May 13, 2004 27631A4 S29GLxxxN MirrorBitTM Flash Family 87
Advance Information
Test Conditions
Note: If V
IO
< V
CC
, the reference level is 0.5 V
IO
.
Key to Switching Waveforms
Note: Diodes are IN3064 or equivalent
Table 15. Test Specifications
2.7 k
C
L
6.2 k
3.3 V
Device
Under
Test
Note: Diodes are IN3064 or equivalent.
Figure 9. Test Setup
Test Condition All Speeds Unit
Output Load 1 TTL gate
Output Load Capacitance, C
L
(including jig capacitance)
30 pF
Input Rise and Fall Times 5 ns
Input Pulse Levels 0.0–V
IO
V
Input timing measurement
reference levels (See Note)
0.5V
IO
V
Output timing measurement
reference levels
0.5 V
IO
V
WAVEFORM INPUTS OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted Changing, State Unknown
Does Not Apply Center Line is High Impedance State (High Z)
V
IO
0.0 V
0.5 V
IO
0.5 V
IO
V
OutputMeasurement LevelInput
Note: If V
IO
< V
CC
, the input measurement reference level is 0.5 V
IO
.
Figure 10. Input Waveforms and
Measurement Levels
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