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S29GL256N10TFI020

Part # S29GL256N10TFI020
Description NOR Flash Parallel 3.3V 256M-bit 32M x 8/16M x 16 100ns 56
Category IC
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Date Code: 0623
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

May 13, 2004 27631A4 S29GLxxxN MirrorBitTM Flash Family 73
Advance Information
Command Definitions
Ta b l e 1 2 . S29GL512N, S29GL256N, S29GL128N Command Definitions, x16
Command (Notes)
Cycles
Bus Cycles (Notes 2–5)
First Second Third Fourth Fifth Sixth
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Read (6) 1 RA RD
Reset (7) 1 XXX F0
Autoselect (Note 8)
Manufacturer ID 4 555 AA 2AA 55 555 90 X00 01
Device ID 4 555 AA 2AA 55 555 90 X01 227E X0E
Note
17
X0F
Note
17
Sector Protect Verify 4 555 AA 2AA 55 555 90
(SA)
X02
XX00
XX01
Secure Device Verify (9) 4 555 AA 2AA 55 555 90 X03
Note
10
CFI Query (11) 1 55 98
Program 4 555 AA 2AA 55 555 A0 PA PD
Write to Buffer 3 555 AA 2AA 55 SA 25 SA WC PA PD WBL PD
Program Buffer to Flash (confirm) 1 SA 29
Write-to-Buffer-Abort Reset (16) 3 555 AA 2AA 55 555 F0
Unlock Bypass 3 555 AA 2AA 55 555 20
Unlock Bypass Program (12) 2 XXX A0 PA PD
Unlock Bypass Sector Erase (12) 2 XXX 80 SA 30
Unlock Bypass Chip Erase (12) 2 XXX 80 XXX 10
Unlock Bypass Reset (13) 2 XXX 90 XXX 00
Chip Erase 6 555 AA 2AA 55 555 80 555 AA 2AA 55 555 10
Sector Erase 6 555 AA 2AA 55 555 80 555 AA 2AA 55 SA 30
Erase Suspend/Program Suspend (14) 1 XXX B0
Erase Resume/Program Resume (15) 1 XXX 30
Sector Command Definitions
SecSi
TM
SEctor
SecSi Sector Entry 3 555 AA 2AA 55 555 88
SecSi Sector Exit (18) 4 555 AA 2AA 55 555 90 XX 00
Lock Register Command Set Definitions
Lock Register
Lock Register Command Set Entry 3 555 AA 2AA 55 555 40
Lock Register Bits Program (22) 2 XXX A0 XXX Data
Lock Register Bits Read (22) 1 00 Data
Lock Register Command Set Exit (18, 23) 2 XXX 90 XXX 00
Password Protection Command Set Definitions
74 S29GLxxxN MirrorBitTM Flash Family 27631A4 May 13, 2004
Advance Information
Legend:
X = Don’t care
RA = Address of the memory to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever
happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of the WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A
max
–A16 uniquely select any sector.
WBL = Write Buffer Location. The address must be within the same write buffer page as PA.
Password
Password Protection Command Set Entry 3 555 AA 2AA 55 555 60
Password Program (20) 2 XXX A0
PWA
x
PWD
x
Password Read (19) 4 XXX
PWD
0
01
PWD
1
02
PWD
2
03
PWD
3
Password Unlock (19) 7
00 25 00 03 00
PWD
0
01
PWD
1
02
PWD
2
03
PWD
3
00 29
Password Protection Command Set Exit (18,
23)
2 XXX 90 XXX 00
Non-Volatile Sector Protection Command Set Definitions
PPB
Nonvolatile Sector Protection Command Set
Entry
3 555 AA 2AA 55 555 C0
PPB Program (24, 25) 2 XXX A0 SA 00
All PPB Erase 2 XXX 80 00 30
PPB Status Read (25) 1 SA
RD
(0)
Non-Volatile Sector Protection Command Set
Exit (18)
2 XXX 90 XXX 00
Global Non-Volatile Sector Protection Freeze Command Set Definitions
PPB Lock Bit
Global Non-Volatile Sector Protection Freeze
Command Set Entry
3 555 AA 2AA 55 555 50
PPB Lock Bit Set (25) 2 XXX A0 XXX 00
PPB Lock Status Read (25) 1 XXX
RD
(0)
Global Non-Volatile Sector Protection Freeze
Command Set Exit (18)
2 XXX 90 XXX 00
Volatile Sector Protection Command Set Definitions
DYB
Volatile Sector Protection Command Set Entry 3 555 AA 2AA 55 555 E0
DYB Set (24, 25) 2 XXX A0 SA 00
DYB Clear (25) 2 XXX A0 SA 01
DYB Status Read (25) 1 SA
RD
(0)
Volatile Sector Protection Command Set Exit
(18)
2 XXX 90 XXX 00
Command (Notes)
Cycles
Bus Cycles (Notes 2–5)
First Second Third Fourth Fifth Sixth
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
May 13, 2004 27631A4 S29GLxxxN MirrorBitTM Flash Family 75
Advance Information
WC = Word Count is the number of write buffer locations to load minus 1.
PWD = Password
PWD
x
= Password word0, word1, word2, and word3.
DATA = Lock Register Contents: PD(0) = SecSi Sector Protection Bit, PD(1) = Persistent Protection Mode Lock Bit, PD(2) =
Password Protection Mode Lock Bit.
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except for the read cycle, and the 4th, 5th, and 6th cycle of the autoselect command sequence, all bus cycles are write
cycles.
4. Data bits DQ15-DQ8 are don't cares for unlock and command cycles.
5. Address bits A
MAX
:A16 are don't cares for unlock and command cycles, unless SA or PA required. (A
MAX
is the Highest
Address pin.).
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high
(while the device is providing status data).
8. The fourth, fifth, and sixth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more
information. This is same as PPB Status Read except that the protect and unprotect statuses are inverted here.
10. The data value for DQ7 is “1” for a serialized and protected OTP region and “0” for an unserialized and unprotected
SecSi™Sector region. See "SecSi™Sector Flash Memory Region” for more information. For S29GLVxxxNH: XX18h/18h = Not
Factory Locked. XX98h/98h = Factory Locked. For S29GLxxxNL: XX08h/08h = Not Factory Locked. XX88h/88h = Factory
Locked.
11. Command is valid when device is ready to read array data or when device is in autoselect mode.
12. The Unlock-Bypass command is required prior to the Unlock-Bypass-Program command.
13. The Unlock-Bypass-Reset command is required to return to reading array data when the device is in the unlock bypass
mode.
14. The system may read and program/program suspend in non-erasing sectors, or enter the autoselect mode, when in the
Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation.
15. The Erase Resume/Program Resume command is valid only during the Erase Suspend/Program Suspend modes.
16. Issue this command sequence to return to READ mode after detecting device is in a Write-to-Buffer-Abort state. NOTE: the
full command sequence is required if resetting out of ABORT while using Unlock Bypass Mode.
17. S29GL512NH/L = 2223h/23h, 220h/01h; S29GL256NH/L = 2222h/22h, 2201h/01h; S29GL128NH/L = 2221h/21h, 2201h/
01h.
18. The Exit command returns the device to reading the array.
19. Note that the password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
20. For PWDx, only one portion of the password can be programmed per each “A0” command.
21. The All PPB Erase command embeds programming of all PPB bits before erasure.
22. All Lock Register bits are one-time programmable. Note that the program state = “0” and the erase state = “1”. Also note
that of both the Persistent Protection Mode Lock Bit and the Password Protection Mode Lock Bit cannot be programmed at the
same time or the Lock Register Bits Program operation will abort and return the device to read mode. Lock Register bits that
are reserved for future use will default to “1's”. The Lock Register is shipped out as “FFFF's” before Lock Register Bit program
execution.
23. If any of the Entry command was initiated, an Exit command must be issued to reset the device into read mode. Otherwise
the device will hang.
24. If ACC = V
HH
, sector protection will match when ACC = V
IH
25. Protected State = “00h”, Unprotected State = “01h”.
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