Name: 2556M
SKU: 2556M

FEATURES

AIN0

AIN1

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

AIN8

GND

INT/EOC

I/O CLOCK

DATA IN

DATA OUT

REF+

REF−

AIN10

AIN9

(TOP VIEW)

PW AND DW PACKAGE

DESCRIPTION

SUPPORTS DEFENSE, AEROSPACE,

APPLICATIONS

TLV2556-EP

www.ti.com

................................................................................................................................................... SLAS598A – NOVEMBER 2008 – REVISED JULY 2009

12-BIT 200-KSPS 11-CHANNEL LOW-POWER SERIAL ANALOG-TO-DIGITAL CONVERTER

WITH INTERNAL REFERENCE

• 12-Bit-Resolution Analog-to-Digital Converter

(ADC)

• Up to 200-KSPS (150-KSPS for 3 V)

Throughput Bit With 12-Output Mode Over

Operating Temperature Range

• 11 Analog Input Channels

• 3 Built-In Self-Test Modes

• Programmable Reference (2.048 V/4.096 V

Internal or External)

• Inherent Sample and Hold Function

• Linearity Error... ± 1 LSB Max

• On-Chip Conversion Clock

• Programmable Conversion Status Output: INT

or EOC

The TLV2556 is a 12-bit, switched-capacitor,

• Unipolar or Bipolar Output Operation

successive-approximation, analog-to-digital converter

• Programmable MSB or LSB First

(ADC). The ADC has three control inputs [chip select

• Programmable Power Down

( CS), the input-output clock, and the address/control

input (DATAIN)], designed for communication with the

• Programmable Output Data Length

serial port of a host processor or peripheral through a

• SPI Compatible Serial Interface With I/O Clock

serial 3-state output.

Frequencies up to 15 MHz (CPOL = 0,

In addition to the high-speed converter and versatile

CPHA = 0)

control capability, the device has an on-chip

14-channel multiplexer that can select any one of 11

inputs or any one of three internal self-test voltages

AND MEDICAL APPLICATIONS

using configuration register 1. The sample-and-hold

• Controlled Baseline

function is automatic. At the end of conversion, when

• One Assembly/Test Site

programmed as EOC, the pin 19 output goes high to

indicate that conversion is complete. If pin 19 is

• One Fabrication Site

programmed as INT, the signal goes low when the

• Available in Military ( – 55 ° C/125 ° C)

conversion is complete. The converter incorporated in

Temperature Range

(1)

the device features differential, high-impedance

• Extended Product Life Cycle

reference inputs that facilitate ratiometric conversion,

• Extended Product-Change Notification

scaling, and isolation of analog circuitry from logic

and supply noise. A switched-capacitor design allows

• Product Traceability

low-error conversion over the full operating

temperature range. An internal reference is available

and its voltage level is programmable via

• Industrial Process Control

configuration register 2 (CFGR2).

• Portable Data Logging

• Battery Powered Instruments

• Automotive

(1) Additional temperature ranges are available - contact factory

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

14-Channel

Analog

Multiplexer

Reference CTRL

12-to-1

Data

Selector

and Driver

Control Logic

and I/O

Counters

Input Address

REF+ REF−

DATA

OUT

DATA IN

I/O CLOCK

INT/EOC

AIN0

AIN1

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

AIN8

AIN9

AIN10

14 13

Low Power

12-Bit

SAR ADC

Sample

and Hold

Output Data

4.096/2.048 V

Internal Reference

GND

Internal

OSC

Self Test

TLV2556-EP

SLAS598A – NOVEMBER 2008 – REVISED JULY 2009 ...................................................................................................................................................

www.ti.com

The TLV2556 is characterized for operation from T

= – 55 ° C to 125 ° C.

ORDERING INFORMATION

(1)

PACKAGE

(2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

– 55 ° C to 125 ° C TSSOP – PW Reel of 2000 TLV2556MPWREP TL2556EP

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com .

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .

Functional Block Diagram

Product Folder Link(s): TLV2556-EP

TLV2556-EP

www.ti.com

................................................................................................................................................... SLAS598A – NOVEMBER 2008 – REVISED JULY 2009

TERMINAL FUNCTIONS

TERMINAL

I/O DESCRIPTION

NAME NO.

1 – 9,

AIN0 – AIN10 I Analog input. These 11 analog-signal inputs are internally multiplexed.

11, 12

Chip select. A high-to-low transition on CS resets the internal counters and controls and enables

CS 15 I DATA OUT, DATA IN, and I/O CLOCK. A low-to-high transition disables DATA IN and I/O CLOCK

within a setup time.

Serial data input. The 4-bit serial data can be used as address selects the desired analog input

channel or test voltage to be converted next, or a command to activate other features. The input

DATA IN 17 I data is presented with the MSB (D7) first and is shifted in on the first four rising edges of the I/O

CLOCK. After the four address/command bits are read into the command register CMR, I/O

CLOCK clocks the remaining four bits of configuration in.

The 3-state serial output for the A/D conversion result. DATA OUT is in the high-impedance state

when CS is high and active when CS is low. With a valid CS, DATA OUT is removed from the

high-impedance state and is driven to the logic level corresponding to the MSB(most significant

DATA OUT 16 O

bit)/LSB(least significant bit) value of the previous conversion result. The next falling edge of I/O

CLOCK drives DATA OUT to the logic level corresponding to the next MSB/LSB, and the remaining

bits are shifted out in order.

Status output, used to indicate the end of conversion (EOC) or an interrupt ( INT) to host processor.

Programmed as INT (interrupt): INT goes from a high to a low logic level after the conversion is

INT/EOC 19 O

complete and the data is ready for transfer. INT is cleared by a rising I/O CLOCK transition.

Programmed as EOC: EOC goes from a high to a low logic level after the falling edge of the last I/O

CLOCK and remains low until the conversion is complete and the data is ready for transfer.

Ground. GND is the ground return terminal for the internal circuitry. Unless otherwise noted, all

GND 10

voltage measurements are with respect to GND.

Input /output clock. I/O CLOCK receives the serial input and performs the following four functions:

1. It clocks the eight input data bits into the input data register on the first eight rising edges of

I/O CLOCK with the multiplexer address available after the fourth rising edge.

2. On the fourth falling edge of I/O CLOCK, the analog input voltage on the selected multiplexer

input begins charging the capacitor array and continues to do so until the last falling edge of

I/O CLOCK 18 I

I/O CLOCK.

3. The remaining 11 bits of the previous conversion data are shifted out on DATA OUT. Data

changes on the falling edge of I/O CLOCK.

4. Control of the conversion is transferred to the internal state controller on the falling edge of the

last I/O CLOCK.

Positive reference voltage The upper reference voltage value (nominally V

) is applied to REF+.

The maximum analog input voltage range is determined by the difference between the voltage

REF+ 14 I/O

applied to terminals REF+ and REF – .

When the internal reference is used it is capable of driving a 10-k Ω , 10-pF load.

Negative reference voltage. The lower reference voltage value (nominally ground) is applied to

REF – 13 I/O REF – . This pin is connected to analog ground (GND of the ADC) when the internal reference is

used.

20 Positive supply voltage

Product Folder Link(s): TLV2556-EP

Part #	2556M
Description
Category	IC
Availability	In Stock
Qty	4

2556M

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