1−3
ru – read-only access with updates by the controller internal hardware
rw – read and write access
rcu – read access with the option to clear an asserted bit with a write-back of 1b including updates by
the controller internal hardware.
1.6 Ordering Information
ORDERING NUMBER NAME VOLTAGE PACKAGE
PCI1510 PC Card controller 3.3 V, 5-V tolerant I/Os 144-terminal LQFP
144-ball PBGA (GGU or ZGU)
209-ball PBGA (GVF or ZVF)
1.7 PCI1510 Data Manual Document History
DATE PAGE NUMBER REVISION
01/2003 2−23 Modified terminal number of CAD30 from 143 to 142 for PGE package
01/2003 3−2 Added new subsection 3.4.1 to describe GRST during power up
01/2003 3−11 Modified byte-read diagram (Figure 3−12) to better reflect a read transaction to the EEPROM
01/2003 3−20 Modified the description of the power management capabilities register. This register is not a static
read-only register.
08/2003 1−3 Added lead-free (Pb, atomic number 82) MicroStar BGA package (ZGU) to ordering information
08/2003 2−1 Added description for ZGU package
08/2003 8−4 Added ZGU mechanical drawing
10/2003 1−1 Added GVF package to features
10/2003 1−3 Added GVF package to ordering information
10/2003 2−8 Added GVF terminal descriptions, Table 2−3
10/2003 8−2 Added GVF mechanical drawing.
07/2004 Chapters 1, 2, 8 Added RGVF, RZVF, and ZVF packages and pinout.
12/2004 Chapters 1, 2, 8 Removed RGVF and RZVF packages and pinout.
Added Section 1.5, Document Conventions
