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1 Introduction
1.1 Description
The Texas Instruments PCI1510 device, a 144-terminal or a 209-terminal single-slot CardBus controller designed
to meet the PCI Bus Power Management Interface Specification for PCI to CardBus Bridges, is an ultralow-power
high-performance PCI-to-CardBus controller that supports a single PC card socket compliant with the PC Card
Standard (rev. 7.2). The controller provides features that make it the best choice for bridging between PCI and PC
Cards in both notebook and desktop computers. The PC Card Standard retains the 16-bit PC Card specification
defined in the PCI Local Bus Specification and defines the 32-bit PC Card, CardBus, capable of full 32-bit data
transfers at 33 MHz. The controller supports both 16-bit and CardBus PC Cards, powered at 5 V or 3.3 V, as required.
The controller is compliant with the PCI Local Bus Specification, and its PCI interface can act as either a PCI master
device or a PCI slave device. The PCI bus mastering is initiated during CardBus PC Card bridging transactions. The
controller is also compliant with PCI Bus Power Management Interface Specification (rev. 1.1).
All card signals are internally buffered to allow hot insertion and removal without external buffering. The controller
is register-compatible with the Intel 82365SL-DF and 82365SL ExCA controllers. The controller internal data path
logic allows the host to access 8-, 16-, and 32-bit cards using full 32-bit PCI cycles for maximum performance.
Independent buffering and a pipeline architecture provide an unsurpassed performance level with sustained bursting.
The controller can also be programmed to accept fast posted writes to improve system-bus utilization.
Multiple system-interrupt signaling options are provided, including parallel PCI, parallel ISA, serialized ISA, and
serialized PCI. Furthermore, general-purpose inputs and outputs are provided for the board designer to implement
sideband functions. Many other features designed into the PCI1510 controller, such as a socket activity light-emitting
diode (LED) outputs, are discussed in detail throughout this document.
An advanced complementary metal-oxide semiconductor (CMOS) process achieves low system power consumption
while operating at PCI clock rates up to 33 MHz. Several low-power modes enable the host power management
system to further reduce power consumption.
1.2 Features
The controller supports the following features:
• A 144-terminal low-profile QFP (PGE), 144-terminal MicroStar BGA ball-grid array (GGU/ZGU) package,
or a 209-terminal PBGA (GVF/ZVF) package
• 2.5-V core logic and 3.3-V I/O with universal PCI interfaces compatible with 3.3-V and 5-V PCI signaling
environments
• Integrated low-dropout voltage regulator (LDO-VR) eliminates the need for an external 2.5-V power supply
• Mix-and-match 5-V/3.3-V 16-bit PC Cards and 3.3-V CardBus Cards
• A single PC Card or CardBus slot with hot insertion and removal
• Parallel interface to TI TPS2211A single-slot PC Card power switch
• Burst transfers to maximize data throughput with CardBus Cards
• Interrupt configurations: parallel PCI, serialized PCI, parallel ISA, and serialized ISA
• Serial EEPROM interface for loading subsystem ID, subsystem vendor ID, and other configuration registers
• Pipelined architecture for greater than 130-Mbps throughput from CardBus-to-PCI and from PCI-to-
CardBus
