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OPA2132U

Part # OPA2132U
Description 8 LD SOIC FET OP AMP - Rail/Tube
Category IC
Availability In Stock
Qty 2
Qty Price
1 + $7.60091
Manufacturer Available Qty
Burr-Brown Corporation
Date Code: 0102
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Ambient Temperature ( °C)
Input Bias Current (pA)
100k
10k
1k
100
10
1
0.1
–75 –50 –25 0 25 50 75 100 125
Dual
Quad
Single
High Speed Test
Warmed Up
Frequency (Hz)
Channel Separation (dB)
160
140
120
100
80
100 1k 10k 100k
Dual and quad devices.
G = 1, all channels.
Quad measured channel
A to D or B to C—other
combinations yield improved
rejection.
R
L
= ∞
R
L
= 2kΩ
1
1k
100
10
Voltage Noise (nV/√Hz)
Frequency (Hz)
10 100 1k 10k 100k 1M
1
Current Noise (fA/√Hz)
Voltage Noise
Current Noise
0.1 1 10 100 1k 10k 100k 1M 10M
160
140
120
100
80
60
40
20
0
–20
0
–45
–90
–135
–180
Voltage Gain (dB)
Phase Shift (°)
Frequency (Hz)
Φ
G
Frequency (Hz)
PSR, CMR (dB)
120
100
80
60
40
20
0
10 100 1k 10k 100k 1M
CMR
–PSR
+PSR
OPA132
,
OPA2132
,
OPA4132
www.ti.com
SBOS054B –JANUARY 1995–REVISED SEPTEMBER 2015
6.5 Typical Characteristics
At T
A
= 25°C, V
S
= ±15 V, R
L
= 2 kΩ, unless otherwise noted.
Figure 1. Open-Loop Gain and Phase vs Frequency Figure 2. Power Supply and Common-Mode Rejection vs
Frequency
Figure 3. Input Voltage and Current Noise Spectral Density
Figure 4. Channel Separation vs Frequency
vs Frequency
Figure 5. Input Bias Current vs Temperature
Figure 6. Input Bias Current vs Input Common-Mode
Voltage
Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: OPA132 OPA2132 OPA4132
Frequency (Hz)
THD+Noise (%)
0.01
0.001
0.0001
0.00001
10 100 1k 10k 100k
2kΩ
600Ω
R
L
G = +10
G = +1
V
O
= 3.5Vrms
Frequency (Hz)
10k 100k 1M 10M
30
20
10
0
Output Voltage (Vp-p)
V
S
= ±15V
V
S
= ±2.5V
V
S
= ±5V
Maximum output voltage
without slew-rate
induced distortion
Percent of Amplifiers (%)
Offset Voltage (µV)
–
1400
–
1200
–
1000
–
800
–
600
–
400
–
200
0
200
400
600
800
1000
1200
1400
12
10
8
6
4
2
0
Typical production
distribution of packaged
units. Single, dual and
quad units included.
Percent of Amplifiers (%)
Offset Voltage Drift (µV/°C)
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
Typical production distribution
of packaged units. Single,
dual and quad units included.
Ambient Temperature ( °C)
Quiescent Current Per Amp (mA)
4.3
4.2
4.1
4.0
3.9
3.8
60
50
40
30
20
10
Short-Circuit Current (mA)
–75 –50 –25 0 25 50 75 100 125
±I
SC
±I
Q
Ambient Temperature ( °C)
A
OL
, CMR, PSR (dB)
130
120
110
100
90
–75 –50 –25 0 25 50 75 100 125
Open-Loop
Gain
PSR
CMR
OPA132
,
OPA2132
,
OPA4132
SBOS054B –JANUARY 1995–REVISED SEPTEMBER 2015
www.ti.com
Typical Characteristics (continued)
At T
A
= 25°C, V
S
= ±15 V, R
L
= 2 kΩ, unless otherwise noted.
Figure 7. A
OL
, CMR, PSR vs Temperature
Figure 8. Quiescent Current and Short-Circuit Current vs
Temperature
Figure 10. Offset Voltage Drift Production Distribution
Figure 9. Offset Voltage Production Distribution
Figure 11. Total Harmonic Distortion + Noise vs Frequency Figure 12. Maximum Output Voltage vs Frequency
8 Submit Documentation Feedback Copyright © 1995–2015, Texas Instruments Incorporated
Product Folder Links: OPA132 OPA2132 OPA4132
15
14
13
12
11
10
–10
–11
–12
–13
–14
–15
0 10 20 30 40 50 60
Output Current (mA)
Output Voltage Swing (V)
–55°C
–55°C
25°C25°C
85°C
85°C
125°C
125°C
25°C
V
IN
= –15V
V
IN
= 15V
FPO
Closed-Loop Gain (V/V)
Settling Time (µs)
100
10
1
0.1
±1 ±10 ±100 ±1000
0.01%
0.1%
60
50
40
30
20
10
0
100pF 1nF 10nF
Load Capacitance
Overshoot (%)
G = +1
G = ±10
G = –1
1 s/divμ
5V/div
200ns/div
50mV/div
OPA132
,
OPA2132
,
OPA4132
www.ti.com
SBOS054B –JANUARY 1995–REVISED SEPTEMBER 2015
Typical Characteristics (continued)
At T
A
= 25°C, V
S
= ±15 V, R
L
= 2 kΩ, unless otherwise noted.
G = 1 C
L
= 100pF
G = 1 C
L
= 100pF
Figure 13. Small-Signal Step Response
Figure 14. Large-Signal Step Response
Figure 15. Settling Time vs Closed-Loop Gain Figure 16. Small-Signal Overshoot vs Load Capacitance
Figure 17. Output Voltage Swing vs Output Current
Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: OPA132 OPA2132 OPA4132
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