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OPA2132U

Part # OPA2132U
Description 8 LD SOIC FET OP AMP - Rail/Tube
Category IC
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Burr-Brown Corporation
Date Code: 0102
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

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OPA132
,
OPA2132
,
OPA4132
SBOS054B JANUARY 1995REVISED SEPTEMBER 2015
OPAx132 High-Speed FET-Input Operational Amplifiers
1 Features 3 Description
The OPAx132 series of FET-input operational
1
FET input: I
B
= 50 pA Maximum
amplifiers provides highspeed and excellent DC
Wide Bandwidth: 8 MHz
performance. The combination of high slew rate and
High Slew Rate: 20 V/µs
wide bandwidth provide fast settling time. Single,
dual, and quad versions have identical specifications
Low Noise: 8nV/Hz (1 kHz)
for maximum design flexibility. High performance
Low Distortion: 0.00008%)
grades are available in the single and dual versions.
High Open-loop Gain: 130 dB (600-Ω load)
All are ideal for general-purpose, audio, data
acquisition and communications applications,
Wide Supply Range: ±2.5 to ±18V
especially where high source impedance is
Low Offset Voltage: 500 µV Maximum
encountered.
Single, Dual, and Quad Versions
The OPAx132 operational amplifiers are easy to use
and free from phase inversion and overload problems
2 Applications
often found in common FET-input operational
SAR ADC Driver
amplifiers. Input cascode circuitry provides excellent
Voltage Reference Buffer common-mode rejection and maintains low input bias
current over its wide input voltage range. The
Trans-impedance Amplifier
OPAx132 series of operational amplifiers are stable in
Photodiode Amplifier
unity gain and provide excellent dynamic behavior
Active Filters
over a wide range of load conditions, including high
load capacitance. Dual and quad versions feature
Integrators
completely independent circuitry for lowest crosstalk
and freedom from interaction, even when overdriven
Low Noise JFET Input
or overloaded.
Single and dual versions are available in 8-pin DIP
and SO-8 surface-mount packages. Quad is available
in 14-pin DIP and SO-14 surface-mount packages. All
are specified for –40°C to 85°C operation
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
PDIP (8) (P) 9.81 mm × 6.35 mm
OPAx132
SOIC (8) (D) 4.90 mm × 3.91 mm
PDIP (8) (P) 9.81 mm × 6.35 mm
OPA2132
SOIC (8) (D) 4.90 mm × 3.91 mm
PDIP (14) (N) 19.30 mm × 6.35 mm
OPA4132
SOIC (14) (D) 8.65 mm × 3.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
OPA132
,
OPA2132
,
OPA4132
SBOS054B JANUARY 1995REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1 Features.................................................................. 1 8 Application and Implementation ........................ 11
8.1 Application Information............................................ 11
2 Applications ........................................................... 1
8.2 Typical Application ................................................. 12
3 Description ............................................................. 1
9 Power Supply Recommendations...................... 14
4 Revision History..................................................... 2
10 Layout................................................................... 14
5 Pin Configuration and Functions......................... 3
10.1 Layout Guidelines ................................................. 14
6 Specifications......................................................... 4
10.2 Layout Example .................................................... 15
6.1 Absolute Maximum Ratings ...................................... 4
11 Device and Documentation Support ................. 16
6.2 ESD Ratings.............................................................. 4
11.1 Device Support .................................................... 16
6.3 Recommended Operating Conditions....................... 4
11.2 Documentation Support ........................................ 16
6.4 Electrical Characteristics........................................... 5
11.3 Related Links ........................................................ 16
6.5 Typical Characteristics.............................................. 7
11.4 Trademarks........................................................... 16
7 Detailed Description............................................ 10
11.5 Electrostatic Discharge Caution............................ 17
7.1 Overview ................................................................. 10
11.6 Glossary................................................................ 17
7.2 Functional Block Diagram ....................................... 10
12 Mechanical, Packaging, and Orderable
7.3 Feature Description................................................. 10
Information ........................................................... 17
7.4 Device Functional Modes........................................ 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (June 2004) to Revision B Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
2 Submit Documentation Feedback Copyright © 1995–2015, Texas Instruments Incorporated
Product Folder Links: OPA132 OPA2132 OPA4132
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
–In D
+In D
V–
+In C
–In C
Out C
Out A
–In A
+In A
V+
+In B
–In B
Out B
14-Pin DIP
SO-14
A D
B C
1
2
3
4
8
7
6
5
Offset Trim
V+
Output
NC
Offset Trim
–In
+In
V–
8-Pin DIP, SO-8
1
2
3
4
8
7
6
5
V+
Out B
–In B
+In B
Out A
–In A
+In A
V–
8-Pin DIP, SO-8
A
B
OPA132
,
OPA2132
,
OPA4132
www.ti.com
SBOS054B JANUARY 1995REVISED SEPTEMBER 2015
5 Pin Configuration and Functions
OPA132: P and D Packages OPA2132: P and D Packages
8-Pin PDIP and 8-Pin SOIC 8-Pin PDIP and 8-Pin SOIC
Top View Top View
OPA4132: P and D Packages
14-Pin PDIP and 14-Pin SOIC
Top View
Pin Functions OPA132
PIN
I/O DESCRIPTION
NAME NO.
Offset Trim 1 I Input offset voltage adjust
–In 2 I Inverting input
+In 3 I Noninverting input
V– 4 Negative power supply
NC 5 No internal connection. Can be left floating.
Output 6 O Output
V+ 7 Positive power supply
Offset Trim 8 I Input offset voltage adjust
Pin Functions OPA2132 and OPA4132
PIN
I/O DESCRIPTION
OPA2132 OPA4132
NAME
NO. NO.
Out A 1 1 O Output channel A
–In A 2 2 I Inverting input channel A
+In A 3 3 I Noninverting input channel A
V+ 8 4 Positive power supply
+In B 5 5 I Noninverting input channel B
–In B 6 6 I Inverting input channel B
Out B 7 7 O Output channel B
Out C 8 O Output channel C
–In C 9 I Inverting input channel C
Copyright © 1995–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: OPA132 OPA2132 OPA4132
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