2
®
OPA177
OPA177 SPECIFICATIONS
At V
S
= ±15V, T
A
= +25°C, unless otherwise noted.
OPA177F OPA177G
PARAMETER CONDITION MIN TYP MAX MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage 10 25 20 60 µV
Long-Term Input Offset
(1)
0.3 0.4 µV/Mo
Voltage Stability
Offset Adjustment Range R
P
= 20kΩ±3 ✻mV
Power Supply Rejection Ratio V
S
= ±3V to ±18V 115 125 110 120 dB
INPUT BIAS CURRENT
Input Offset Current 0.3 1.5 ✻ 2.8 nA
Input Bias Current 0.5 ±2 ✻ ±2.8 nA
NOISE
Input Noise Voltage 1Hz to 100Hz
(2)
85 150 ✻✻nVrms
Input Noise Current 1Hz to 100Hz 4.5 ✻ pArms
INPUT IMPEDANCE
Input Resistance Differential Mode
(3)
26 45 18.5 ✻ MΩ
Common-Mode 200 ✻ GΩ
INPUT VOLTAGE RANGE
Common-Mode Input Range
(4)
±13 ±14 ✻✻ V
Common-Mode Rejection V
CM
= ±13V 130 140 115 ✻ dB
OPEN-LOOP GAIN R
L
≥ 2kΩ
Large Signal Voltage Gain V
O
= ±10V
(5)
5110 12,000 2000 6000 V/mV
OUTPUT
Output Voltage Swing R
L
≥ 10kΩ±13.5 ±14 ✻✻ V
R
L
≥ 2kΩ±12.5 ±13 ✻✻ V
R
L
≥ 1kΩ±12 ±12.5 ✻✻ V
Open-Loop Output Resistance 60 ✻ Ω
FREQUENCY RESPONSE
Slew Rate R
L
≥ 2kΩ 0.1 0.3 ✻✻ V/µs
Closed-Loop Bandwidth G = +1 0.4 0.6 ✻✻ MHz
POWER SUPPLY
Power Consumption V
S
= ±15V, No Load 40 60 ✻✻ mW
V
S
= ±3V, No Load 3.5 4.5 ✻✻ mW
Supply Current V
S
= ±15V, No Load 1.3 2 ✻✻ mA
At V
S
= ±15V, –40°C ≤ T
A
≤ +85°C, unless otherwise noted.
OFFSET VOLTAGE
Input Offset Voltage 15 40 20 100 µV
Average Input Offset 0.1 0.3 0.7 1.2 µV/°C
Voltage Drift
Power Supply Rejection Ratio V
S
= ±3V to ±18V 110 120 106 115 dB
INPUT BIAS CURRENT
Input Offset Current 0.5 2.2 ✻ 4.5 nA
Average Input Offset Current 1.5 40 ✻ 85 pA/°C
Drift
(6)
Input Bias Current 0.5 ±4 ✻ ±6nA
Average Input Bias Current 8 40 15 60 pA/°C
Drift
(6)
INPUT VOLTAGE RANGE
Common-Mode Input Range ±13 ±13.5 ✻✻ V
Common-Mode Rejection V
CM
= ±13V 120 140 110 ✻ dB
OPEN-LOOP GAIN
Large Signal Voltage Gain R
L
≥ 2kΩ, V
O
= ±10V 2000 6000 1000 4000 V/mV
OUTPUT
Output Voltage Swing R
L
≥ 2kΩ±12 ±13 ✻✻ V
POWER SUPPLY
Power Consumption V
S
= ±15V, No Load 60 75 ✻✻ mW
Supply Current V
S
= ±15V, No Load 2 25 ✻✻ mA
✻ Same as specification for product to left.
NOTES: (1) Long-Term Input Offset Voltage Stability refers to the averaged trend line of V
OS
vs time over extended periods after the first 30 days of operation. Excluding
the initial hour of operation, changes in V
OS
during the first 30 operating days are typically less than 2µV. (2) Sample tested. (3) Guaranteed by design. (4) Guaranteed
by CMRR test condition. (5) To insure high open-loop gain throughout the ±10V output range, A
OL
is tested at –10V ≤ V
O
≤ 0V, 0V ≤ V
O
≤ +10V, and –10V ≤ V
O
≤ +10V.
(6) Guaranteed by end-point limits.
