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NDM3000

Part # NDM3000
Description Trans MOSFET N/P-CH 30V 3A 16-Pin SOIC N
Category IC
Availability In Stock
Qty 2242
Qty Price
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137 - 342 $1.46111
343 - 725 $1.37761
726 - 1,562 $1.28021
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Manufacturer Available Qty
National Semiconductor Corp
Date Code: 9648
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

May 1996
NDM3000
3 Phase Brushless Motor Driver
General Description Features
________________________________________________________________________________
Absolute Maximum Ratings T
A
= 25°C unless otherwise noted
Symbol Parameter NDM3000 Units
V
DSS
Drain-Source Voltage (All Types) ± 30 V
V
GSS
Gate-Source Voltage (All Types) ± 20 V
I
D
Drain Current Q1+Q4 or Q1+Q6 or Q3+Q2 -
Continuous Q3+Q6 or Q5+Q2 or Q5+Q4
± 3.0 A
- Pulsed (Note 1a & 2) ± 10
P
D
Total Power Dissipation (Note 1a)
Q1+Q4 or Q1+Q6 or Q3+Q2 or (Note 1b)
Q3+Q6 or Q5+Q2 or Q5+Q4
(Note 1c)
2.5 W
1.6
1.4
T
J
,T
STG
Operating and Storage Temperature Range -55 to 150 °C
NDM3000 Rev. E
The NDM3000 three phase brushless motor driver consists of
three N-Channel and P-Channel MOSFETs in a half bridge
configuration. These devices are produced using Fairchild's
proprietary, high cell density DMOS technology. This very high
density process is tailored to minimize on-state resistance
which reduces power loss, provide superior switching
performance, and withstand high energy pulses in the
avalanche and commutation modes. These devices are
particularly suited for low voltage 3 phase motor driver such as
disk drive spindle motor control and other half bridge
applications.
±3.0A, ±30V, 2.5W
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability.
Industry standard SOIC-16 surface mount package.
Q1
Q2
Q5Q3
Q6Q4
1,16
8,9
4,13
11,14
3,6
2
7
5
10
15
12
© 1997 Fairchild Semiconductor Corporation
THERMAL CHARACTERISTICS
R
θ
JA
Thermal Resistance, Junction-to-Ambient
Q1+Q4 or Q1+Q6 or Q3+Q2 or
Q3+Q6 or Q5+Q2 or Q5+Q4 (Note 1a)
50 °C/W
R
θ
JC
Thermal Resistance, Junction-to-Case
Q1+Q4 or Q1+Q6 or Q3+Q2 or
Q3+Q6 or Q5+Q2 or Q5+Q4 (Note 1)
20 °C/W
Electrical Characteristics (T
A
= 25°C unless otherwise noted)
Symbol Parameter Conditions Type Min Typ Max Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= ± 250 µA
All ±30 V
I
DSS
Zero Gate Voltage Drain Current
V
DS
= ±20 V, V
GS
= 0 V
All ±1 µA
T
J
=55
o
C
±25 µA
I
GSS
Gate - Body Leakage, Forward
V
GS
= ±20 V, V
DS
= 0 V
All ±100 nA
ON CHARACTERISTICS (Note 3)
V
GS(th)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= -250 µA Q1, Q3, Q5 -1 -1.6 -3 V
T
J
=125
o
C
-0.7 -1.25 -2.2
V
DS
= V
GS
, I
D
= 250 µA Q2, Q4, Q6 1 1.7 3
T
J
=125
o
C
0.7 1.2 2.2
R
DS(ON)
Static Drain-Source
On-Resistance
V
GS
= -10 V, I
D
= -3.0 A Q1, Q3, Q5 0.125 0.16
T
J
=125
o
C
0.18 0.29
V
GS
= -4.5 V, I
D
= -1.0 A 0.16 0.25
V
GS
= 10 V, I
D
= 3.0 A
Q2, Q4, Q6 0.07 0.09
T
J
=125
o
C 0.1 0.16
V
GS
= 4.5 V, I
D
= 1.0 A
0.09 0.13
I
D(on)
On-State Drain Current V
GS
= -10 V, V
DS
= -5 V Q1, Q3, Q5 -10 A
V
GS
= 10 V, V
DS
= 5 V
Q2, Q4, Q6 10
DYNAMIC CHARACTERISTICS
C
iss
Input Capacitance Q1, Q3, Q5
V
DS
= -10 V, V
GS
= 0 V,
f = 1.0 MHz
Q2, Q4, Q6
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
Q1, Q3, Q5 375 pF
Q2, Q4, Q6 360
C
oss
Output Capacitance Q1, Q3, Q5 245 pF
Q2, Q4, Q6 260
C
rss
Reverse Transfer Capacitance Q1, Q3, Q5 130 pF
Q2, Q4, Q6 105
NDM3000 Rev. E
Electrical Characteristics (T
A
= 25°C unless otherwise noted)
Symbol Parameter Conditions Type Min Typ Max Units
SWITCHING CHARACTERISTICS (Note 3)
t
D(on)
Turn - On Delay Time Q1, Q3, Q5
V
DD
= -15 V, I
D
= -1 A,
V
GEN
= -10 V, R
GEN
= 6
Q2, Q4, Q6
V
DD
= 15 V, I
D
= 1 A,
V
GEN
= 10 V, R
GEN
= 6
Q1, Q3, Q5 10 40 ns
Q2, Q4, Q6 9 40
t
r
Turn - On Rise Time Q1, Q3, Q5 13 40 ns
Q2, Q4, Q6 21 40
t
D(off)
Turn - Off Delay Time Q1, Q3, Q5 21 90 ns
Q2, Q4, Q6 21 90
t
f
Turn - Off Fall Time Q1, Q3, Q5 5 50 ns
Q2, Q4, Q6 8 50
Q
g
Total Gate Charge Q1, Q3, Q5
V
DS
= -10 V,
I
D
= -3.0 A, V
GS
= -10 V
Q2, Q4, Q6
V
DS
= 10 V,
I
D
= 3.0 A, V
GS
= 10 V
Q1, Q3, Q5 10 25 nC
Q2, Q4, Q6 9.5 25
Q
gs
Gate-Source Charge Q1, Q3, Q5 1.6 nC
Q2, Q4, Q6 1.5
Q
gd
Gate-Drain Charge Q1, Q3, Q5 3 nC
Q2, Q4, Q6 2.5
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current Q1, Q3, Q5 -1.2 A
Q2, Q4, Q6 1.2
V
SD
Drain-Source Diode Forward
Voltage
V
GS
= 0 V, I
S
= -3.0 A
(Note 3)
Q1, Q3, Q5 -0.8 -1.3 V
V
GS
= 0 V, I
S
= 3.0 A
(Note 3)
Q2, Q4, Q6 0.8 1.3
t
rr
Reverse Recovery Time
V
GS
= 0 V, I
F
= ±3.0 A,
dI
F
/dt = 100 A/µs
All 100 ns
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
P
D
(
t
)
=
T
J
T
A
R
θJ A
(t)
=
T
J
T
A
R
θJ C
+R
θCA
(
t
)
= I
D
2
(t) × R
DS(ON ) T
J
Typical R
θ
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 50
o
C/W when mounted on a 1 in
2
pad of 2oz cpper.
b. 80
o
C/W when mounted on a 0.027 in
2
pad of 2oz cpper.
c. 90
o
C/W when mounted on a 0.0028 in
2
pad of 2oz cpper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDM3000 Rev. E
1a 1b
1c
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