For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while
G should be made
a common connection to all devices in the array
and connected to the
READ line from the system
control bus.
This ensures that all deselected memory devices
are in their low power standby mode and that the
output pins are only active when data is required
from a particular memory device.
System Considerations
The power switching characteristics of fast
EPROMs require careful decoupling of the devices.
The supply current, I
CC
, has three segments that
are of interest to the system designer : the standby
current level, the active current level, and transient
current peaks that are produced by the falling and
rising edges of
E. The magnitude of the transient
current peaks is dependent on the capacitive and
inductive loading of the device at the output. The
associated transient voltage peaks can be sup-
pressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 1µF ceramic
capacitor be used on every device between V
CC
and V
SS
. This should be a high frequency capacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitors should be used
between V
CC
and V
SS
for every eight devices. The
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
Programmain
When delivered, (and after each erasure for UV
EPROM), all bits of the M27256 are in the “1" state.
Data is introduced by selectively programming ”0s"
into the desired bit locations. Although only “0s” will
be programmed, both “1s” and “0s” can be present
in the data word. The only way to change a “0" to
a ”1" is by ultraviolet light erasure. The M27256 is
in the programming mode when V
PP
input is at
12.5V and
E is at TTL low. The data to be pro-
grammed is applied 8 bits in parallel to the data
output pins. The levels required for the address and
data inputs are TTL.
Fast Programming Algorithm
Fast Programming Algorithm rapidly programs
M27256 EPROMs using an efficient and reliable
method suited to the production programming en-
vironment. Programming reliability is also ensured
as the incremental program margin of each byte is
continually monitored to determine when it has
been successfully programmed. A flowchart of the
M27256 Fast Programming Algorithm is shown on
the Flowchart. The Fast Programming Algorithm
utilizes two different pulse types : initial and over-
program. The duration of the initial
E pulse(s) is
1ms, which will then be followed by a longer over-
program pulse of length 3ms by n (n is equal to the
number of the initial one millisecond pulses applied
Mode E GA9V
PP
Q0 - Q7
Read V
IL
V
IL
XV
CC
Data Out
Output Disable V
IL
V
IH
XV
CC
Hi-Z
Program V
IL
Pulse V
IH
XV
PP
Data In
Verify V
IH
V
IL
XV
PP
Data Out
Optional Verify V
IL
V
IL
XV
PP
Data Out
Program Inhibit V
IH
V
IH
XV
PP
Hi-Z
Standby V
IH
XXV
CC
Hi-Z
Electronic Signature V
IL
V
IL
V
ID
V
CC
Codes
Note: X = V
IH
or V
IL
, V
ID
= 12V ± 0.5%.
Table 3. Operating Modes
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code V
IL
00100000 20h
Device Code V
IH
00000100 04h
Table 4. Electronic Signature
DEVICE OPERATION (cont’d)
M27256
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