23
LTC1538-AUX/LTC1539
APPLICATIONS INFORMATION
WUU
U
With the 0.033Ω sense resistor I
SC(AVG)
= 4A will result,
increasing the Si4412DY dissipation to 950mW at a die
temperature of 105°C.
C
IN
will require an RMS current rating of at least 1.5A at
temperature and C
OUT
will require an ESR of 0.03Ω for low
output ripple. The output ripple in continuous mode will be
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
V
ORIPPLE
= R
ESR
(∆I
L
) = 0.03Ω(1.12A) = 34mV
P-P
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1538-AUX/LTC1539. These items are also illustrated
graphically in the layout diagram of Figure 13. Check the
following in your layout:
1. Are the high current power ground current paths using
or running through any part of signal ground? The
LTC1438/LTC1438X/LTC1439 IC’s have their sensitive
pins on one side of the package. These pins include the
signal ground for the reference, the oscillator input, the
voltage and current sensing for both controllers and the
low battery/comparator input. The signal ground area
used on this side of the IC must return to the bottom
plates of all of the output capacitors. The high current
power loops formed by the input capacitors and the
ground returns to the sources of the bottom
N-channel MOSFETs, anodes of the Schottky diodes,
and (-) plates of C
IN
, should be as short as possible and
tied through a low resistance path to the bottom plates
of the output capacitors for the ground return.
2. Do the LTC1538-AUX/LTC1539 SENSE
–
1 and V
OSENSE2
pins connect to the (+) plates of C
OUT
? In adjustable
applications, the resistive divider R1/R2 must be con-
nected between the (+) plate of C
OUT
and signal ground
and the HF decoupling capacitor should be as close as
possible to the LTC1538-AUX/LTC1539.
3. Are the SENSE
–
and SENSE
+
leads routed together with
minimum PC trace spacing? The filter capacitors be-
tween SENSE
+
1 (SENSE
+
2) and SENSE
–
1 (SENSE
–
2)
should be as close as possible to the LTC1538-AUX/
LTC1539.
4. Do the (+) plates of C
IN
connect to the drains of the
topside MOSFETs as closely as possible? This capaci-
tor provides the AC current to the MOSFETs.
5. Is the INTV
CC
decoupling capacitor connected closely
between
INTV
CC
and the power ground pin? This ca-
pacitor carries the MOSFET driver peak currents.
6. Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
should be placed at the furthest point from the
LTC1538-AUX/LTC1539.
7. Use a low impedance source such as a logic gate to drive
the PLLIN pin and keep the lead as short as possible.
PC BOARD LAYOUT SUGGESTIONS
Switching power supply printed circuit layouts are cer-
tainly among the most difficult analog circuits to design.
The following suggestions will help to get a reasonably
close solution on the first try.
The output circuits, including the external switching
MOSFETs, inductor, secondary windings, sense resistor,
input capacitors and output capacitors all have very large
voltage and/or current levels associated with them. These
components and the radiated fields (electrostatic and/or
electromagnetic) must be kept away from the very sensi-
tive control circuitry and loop compensation components
required for a current mode switching regulator.
The electrostatic or capacitive coupling problems can be
reduced by increasing the distance from the radiator,
typically a very large or very fast moving voltage signal.
The signal points that cause problems generally include:
the “switch” node, any secondary flyback winding voltage
and any nodes which also move with these nodes. The
switch, MOSFET gate, and boost nodes move between VIN
and Pgnd each cycle with less than a 100ns transition time.
The secondary flyback winding output has an AC signal
component of –V
IN
times the turns ratio of the trans-
former, and also has a similar < 100ns transition time. The
feedback control input signals need to have less than a few
millivolts of noise in order for the regulator to perform
properly. A rough calculation shows that 80dB of isolation
at 2MHz is required from the switch node for low noise
switcher operation. The situation is worse by a factor of the
