Table of Contents
About This Document .................................................................................................................... 20
Audience .............................................................................................................................................. 20
About This Manual ................................................................................................................................ 20
Related Documents ............................................................................................................................... 20
Documentation Conventions .................................................................................................................. 20
1 Architectural Overview ...................................................................................................... 22
1.1 Product Features ...................................................................................................................... 22
1.2 Target Applications .................................................................................................................... 28
1.3 High-Level Block Diagram ......................................................................................................... 29
1.4 Functional Overview .................................................................................................................. 30
1.4.1 ARM Cortex™-M3 ..................................................................................................................... 30
1.4.2 Motor Control Peripherals .......................................................................................................... 30
1.4.3 Analog Peripherals .................................................................................................................... 31
1.4.4 Serial Communications Peripherals ............................................................................................ 32
1.4.5 System Peripherals ................................................................................................................... 33
1.4.6 Memory Peripherals .................................................................................................................. 34
1.4.7 Additional Features ................................................................................................................... 35
1.4.8 Hardware Details ...................................................................................................................... 35
2 ARM Cortex-M3 Processor Core ...................................................................................... 37
2.1 Block Diagram .......................................................................................................................... 38
2.2 Functional Description ............................................................................................................... 38
2.2.1 Serial Wire and JTAG Debug ..................................................................................................... 38
2.2.2 Embedded Trace Macrocell (ETM) ............................................................................................. 39
2.2.3 Trace Port Interface Unit (TPIU) ................................................................................................. 39
2.2.4 ROM Table ............................................................................................................................... 39
2.2.5 Memory Protection Unit (MPU) ................................................................................................... 39
2.2.6 Nested Vectored Interrupt Controller (NVIC) ................................................................................ 39
3 Memory Map ....................................................................................................................... 43
4 Interrupts ............................................................................................................................ 45
5 JTAG Interface .................................................................................................................... 48
5.1 Block Diagram .......................................................................................................................... 49
5.2 Functional Description ............................................................................................................... 49
5.2.1 JTAG Interface Pins .................................................................................................................. 50
5.2.2 JTAG TAP Controller ................................................................................................................. 51
5.2.3 Shift Registers .......................................................................................................................... 52
5.2.4 Operational Considerations ........................................................................................................ 52
5.3 Initialization and Configuration ................................................................................................... 55
5.4 Register Descriptions ................................................................................................................ 55
5.4.1 Instruction Register (IR) ............................................................................................................. 55
5.4.2 Data Registers .......................................................................................................................... 57
6 System Control ................................................................................................................... 59
6.1 Functional Description ............................................................................................................... 59
6.1.1 Device Identification .................................................................................................................. 59
6.1.2 Reset Control ............................................................................................................................ 59
3November 30, 2007
Preliminary
LM3S6965 Microcontroller
