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IDT49FCT3805BQI

Part # IDT49FCT3805BQI
Description IC CLOCK BUFFER 1:5 20QSOP
Category IC
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Integrated Device Technology
Date Code: 0802
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
JUNE 2005
2005 Integrated Device Technology, Inc. DSC 6879/-c
IDT49FCT3805B
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
DESCRIPTION:
The FCT3805B is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805B offers low capacitance
inputs with hysteresis.
The FCT3805B is designed for high speed clock distribution where
signal quality and skew are critical. The FCT3805B also allows single
point-to-point transmission line driving in applications such as address
distribution, where one signal must be distributed to multiple recievers with
low skew and high signal quality.
For more information on using the FCT3805B with two different input
frequencies on bank A and B, please see AN-236.
FUNCTIONAL BLOCK DIAGRAM
5
OA
1 - OA5
OB1 - OB5
OEA
INA
OEB
INB
MON
5
PIN CONFIGURATION
OA1
OA3
OA4
GNDQ
INA
VCCA
OA2
GNDA
OA5
OEA
1
2
3
4
5
6
7
8
9
OB3
OB4
MON
IN
B
VCCB
OB1
OB2
GNDB
OB5
OEB
11
12
13
14
15
16
17
18
19
20
10
SOIC/ SSOP/ QSOP
TOP VIEW
FEATURES:
0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
•V
CC = 3.3V ± 0.3V
Available in SSOP, SOIC, and QSOP packages
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Description Max Unit
VTERM
(2)
Terminal Voltage with Respect to GND –0.5 to +4.6 V
VTERM
(3)
Terminal Voltage with Respect to GND –0.5 to +7 V
VTERM
(4)
Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 ° C
IOUT DC Output Current –60 to +60 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. V
CC terminals.
3. Input terminals.
4. Outputs and I/O terminals.
CAPACITANCE (TA = +25
O
C, f = 1.0MHz)
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 5.5 8 pF
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Pin Names Description
OEA, OEB 3-State Output Enable Inputs (Active LOW)
INA, INB Clock Inputs
OAn, OBn Clock Outputs
M O N Monitor Output
FUNCTION TABLE
(1)
Inputs Outputs
OEA, OEB INA, INB OAn, OBn MON
LLLL
LHHH
HLZL
HHZH
NOTE:
1. H = HIGH
L = LOW
Z = High-Impedance
3
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
Commercial: TA = 0°C to +70°C, Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
Symbol Parameter Test Conditions
(1)
Min. Typ. Max. Unit
V
IH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2 5.5 V
Input HIGH Level (I/O pins) 2 VCC + 0.5
VIL Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level –0.5 0.8 V
IIH Input HIGH Current (Input pins) VCC = Max. VI = 5.5V ±1
Input HIGH Current (I/O pins) VI = VCC ——±A
I
IL Input LOW Current (Input pins) VCC = Max. VI = GND ±1
Input LOW Current (I/O pins) VI = GND ±1
IOZH High Impedence Output Current VCC = Max. VO = VCC ——±A
IOZL (3-State Output Pins) VO = GND ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA –0.7 –1.2 V
IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
–36 –60 –110 mA
IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
50 90 200 mA
VOH Output HIGH Voltage VCC = Min. IOH = –0.1mA VCC–0.2
VIN = VIH or VIL IOH = –8mA 2.4
(5)
3—V
VOL Output LOW Voltage VCC = Min. IOL = 0.1mA 0.2
VIN = VIH or VIL IOL = 16mA 0.2 0.4 V
IOL = 24mA 0.3 0.5
IOFF Input Power Off Leakage VCC = 0V, VIN = 4.5V ±A
IOS Short Circuit Current
(4)
VCC = Max., VO = GND
(3)
–60 –135 –240 mA
VH Input Hysteresis 150 mV
ICCL Quiescent Power Supply Current VCC = Max. 0.1 10 µA
ICCH VIN = GND or VCC
ICCZ
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = Vcc - 0.6V at rated current.
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