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ICS8543BGI

Part # ICS8543BGI
Description IC CLK BUFFER 2:4 650MHZ 20TSSOP
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

ICS8543 Data Sheet LOW SKEW, 1-to-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
ICS8543BG REVISION E DECEMBER 17, 2010 4 ©2010 Integrated Device Technology, Inc.
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
Table 4B. LVCMOS/LVTTL DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
Item Rating
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5V
Outputs, I
O
Continuos Current
Surge Current
10mA
15mA
Package Thermal Impedance, θ
JA
73.2°C/W (0 lfpm)
Storage Temperature, T
STG
-65°C to 150°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 3.135 3.3 3.465 V
I
DD
Power Supply Current 50 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2 3.765 V
V
IL
Input Low Voltage 0.8 V
I
IH
Input High Current
OE, CLK_EN V
DD
= V
IN
= 3.465V 5 µA
CLK_SEL V
DD
= V
IN
= 3.465V 150 µA
I
IL
Input Low Current
OE, CLK_EN V
DD
= 3.465V, V
IN
= 0V -150 µA
CLK_SEL V
DD
= 3.465V, V
IN
= 0V -5 µA
ICS8543 Data Sheet LOW SKEW, 1-to-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
ICS8543BG REVISION E DECEMBER 17, 2010 5 ©2010 Integrated Device Technology, Inc.
Table 4C. Differential DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as V
IH
.
Table 4D. LVPECL DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
NOTE 1: Common mode input voltage is defined as V
IH
.
Table 4E. LVDS DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
I
IH
Input High Current
CLK V
DD
= V
IN
= 3.465V 150 µA
nCLK V
DD
= V
IN
= 3.465V 5 µA
I
IL
Input Low Current
CLK V
DD
= 3.465V, V
IN
= 0V -5 µA
nCLK V
DD
= 3.465V, V
IN
= 0V -150 µA
V
PP
Peak-to-Peak Voltage; NOTE 1 0.15 1.3 V
V
CMR
Common Mode Input Voltage;
NOTE 1, 2
0.5 V
DD
– 0.85 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
I
IH
Input High Current
PCLK V
DD
= V
IN
= 3.465V 150 µA
nPCLK V
DD
= V
IN
= 3.465V 5 µA
I
IL
Input Low Current
PCLK V
DD
= 3.465V, V
IN
= 0V -5 µA
nPCLK V
DD
= 3.465V, V
IN
= 0V -150 µA
V
PP
Peak-to-Peak Voltage 0.3 1.0 V
V
CMR
Common Mode Input Voltage;
NOTE 1
1.5 V
DD
V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OD
Differential Output Voltage 200 280 360 mV
V
OD
V
OD
Magnitude Change 0 40 mV
V
OS
Offset Voltage 1.125 1.25 1.375 V
V
OS
V
OS
Magnitude Change 5 25 mV
I
Oz
High Impedance Leakage -10 +10 µA
I
OFF
Power Off Leakage -20 ±1 +20 µA
I
OSD
Differential Output Short Circuit Current -3.5 -5 mA
I
OS
Output Short Circuit Current -3.5 -5 mA
V
OH
Output Voltage High 1.34 1.6 V
V
OL
Output Voltage Low 0.9 1.06 V
ICS8543 Data Sheet LOW SKEW, 1-to-4, DIFFERENTIAL-TO-LVDS FANOUT BUFFER
ICS8543BG REVISION E DECEMBER 17, 2010 6 ©2010 Integrated Device Technology, Inc.
AC Electrical Characteristics
Table 5. AC Characteristics, V
DD
= 3.3V ± 5%, T
A
= 0°C to 70°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at 500MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential output
cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Maximum Output Frequency 800 MHz
t
PD
Propagation Delay; NOTE 1 ƒ 800MHz 1.7 2.6 ns
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
153.6MHz, Integration Range:
12kHz – 20MHz
0.164 ps
tsk(o) Output Skew; NOTE 2, 4 40 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 500 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% @ 50MHz 150 350 ps
odc Output Duty Cycle odc 45 50 55 %
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