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ICM7217AIPI

Part # ICM7217AIPI
Description 4 DIGIT LED PRESETTABLE UP/DOWN COUNTER - Bulk
Category IC
Availability In Stock
Qty 2
Qty Price
1 + $11.76769
Manufacturer Available Qty
Harris Corporation
Date Code: 9312
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

9-21
The lCM7217A and the ICM7217C are used to drive com-
mon cathode displays, and the BCD inputs are low true.
BCD outputs are high true.
Notes on Thumbwheel Switches and Multiplexing
As it was mentioned, the ICM7217 is basically designed to
be used with thumbwheel switches for loading the data to
the device. See Figure 14 and Figure 17.
The thumbwheel switches used with these circuits (both
common anode and common cathode) are TRUE BCD
coded; i.e. all switches open corresponds to 0000. Since the
thumbwheel switches are connected in parallel, diodes must
be provided to prevent crosstalk between digits. In order to
maintain reasonable noise margins, these diodes should be
specified with low forward voltage drops (IN914). Similarly, if
the BCD outputs are to be used, resistors should be inserted
in the Digit lines to avoid loading problems.
Output and Input Restrictions
LOAD COUNTER and LOAD REGISTER operations take
1.6ms typical (5ms maximum) after LC or LR are released.
During this load period the
EQUAL and ZERO outputs are
not valid (see Figure 3). Since the Counter and register are
compared by XOR gates, loading the counter or register can
cause erroneous glitches on the
EQUAL and ZERO outputs
when codes cross.
LOAD COUNTER or LOAD REGISTER, and
RESET input
can not be activated at the same time or within a short
period of each other. Operation of each input must be
delayed 1.6ms typical (5ms for guaranteed proper operation)
relating to the preceding one.
Counter and register can be loaded together with the same
value if LC and LR inputs become activated exactly at the
same time.
Notice the setup and hold time of UP/DOWN input when it is
changing during counting operation. Violation of UP/
DOWN
hold time will result in incrementing or decrementing the
counter by 1000, 100 or 10 where the preceding digit is
transitioning from 5 to 6 or 6 to 5.
The
RESET input may be susceptible to noise if its input rise
time is greater than about 500µs This will present no prob-
lems when this input is driven by active devices (i.e., TTL or
CMOS logic) but in hardwired systems adding virtually any
capacitance to the
RESET input can cause trouble. A simple
circuit which provides a reliable power-up reset and a fast
rise time on the
RESET input is shown on Figure 15.
FIGURE 14. LCD DISPLAY INTERFACE (WITH THUMBWHEEL SWITCHES)
8
4
2
1
C
8
4
2
1
C
8
4
2
1
C
8
4
2
1
C
D4
D3
D2
D1
DB3
DB2
DB1
DB0
35
34
33
32
31
30
29
28
27
37 - 40
2 - 26
ICM7211
28 SEGMENTS
AND BACKPLANE
LCD DISPLAY
ICM7217
IJI
D1
D2
D3
D4
4
5
6
7
8s
4s
2s
1s
V
DD
DC
24
23
20
8
9
10
14
RESET
STORE
UP/DN
COUNT
28
27
26
25
V
DD
= 5VV
DD
= 5V
10k - 20k
ICM7217
9-22
When using the circuit as a programmable dividerby n
with equal outputs) a short time delay (about 1µs) is needed
from the
EQUAL output to the RESET input to establish a
pulse of adequate duration. (See Figure 16).
When the circuit is configured to reload the counter or regis-
ter with a new value from the BCD lines (upon reaching
EQUAL), loading time will be digit “on” time multiplied by
four. If this load time is longer than one period of the input
count, a count can be lost. Since the circuit will retain data in
the register, the register need only be updated when a new
value is to be entered.
RESET will not clear the register.
Test Circuit
N.O.
V
DD
ICM7217
0.047µF
RESET INPUT
10
V
SS
10k 5k
FIGURE 15. POWER ON RESET
V
DD
RESETEQUAL
47pF
33K
FIGURE 16. EQUAL TO RESET DELAY
CARRY
ZERO
EQUAL
BCD I/O 8s
BCD I/O 4s
BCD I/O 2s
BCD I/O 1s
COUNT INPUT
STORE
UP/
DOWN
LOAD REGISTER
LOAD COUNTER
SCAN
RESET
DISPLAY
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ICM7217
ICM7217B
9999
1
2
3
4
5
6
7
8
9
10
11
12
13
14
a
b
c
d
f
g
e
a
b
c
d
f
g
e
a
b
c
d
f
g
e
a
b
c
d
f
g
e
g
b
e
f
d
a
c
COMMON ANODE DISPLAY
D1
D3 D2D4
D1
D3 D2D4
N.O.
V
DD
V
SS
CONTROL
V
DD
THUMBWHEEL SWITCHES
+5V
ICM7217
9-23
Applications
3-Level Inputs
ICM7217 has three inputs with 3-level logic states; High, Low
and Disconnected. These inputs are: LOAD REGISTER/OFF,
LOAD COUNTER/
I/O OFF and DISPLAY CONT.
The circuits illustrated on Figure 11 can be used to drive
these inputs in different applications.
Fixed Decimal Point
In the common anode versions, a fixed decimal point may be
activated by connecting the DP segment lead from the appro-
priate digit (with separate digit displays) through a 39 series
resistor to Ground. With common cathode devices, the DP
segment lead should be connected through a 75 series
resistor to V
DD
.
To force the device to display leading zeroes after a fixed
decimal point, use a bipolar transistor and base resistor in a
configuration like that shown in Figure 12 with the resistor
connected to the digit output driving the DP for left hand DP
displays, and to the next least significant digit output for right
hand DP display.
Driving Larger Displays
For displays requiring more current than the ICM7217 can
provide, the circuits of Figure 13 can be used.
LCD Display Interface
The low-power operation of the ICM7217 makes an LCD
interface desirable. The Intersil ICM7211 4-digit, BCD-to-LCD
display driver easily interfaces to the ICM7217 as shown in
Figure 14. Total system power consumption is less than 5mW.
System timing margins can be improved by using capacitance
to ground to slow down the BCD lines.
The 10k - 20k resistors on the switch BCD lines serve to
isolate the switches during BCD output.
Unit Counter with BCD Output
The simplest application of the ICM7217 is a 4-digit unit
counter (Figure 18). All that is required is an ICM7217, a
power supply and a 4 digit display. Add a momentary switch
for reset, an SPDT center-off switch to blank the display or
view leading zeroes, and one more SPDT switch for up/
down control. Using an ICM7217A with a common-cathode
calculator-type display results in the least expensive digital
counter/display system available.
Inexpensive Frequency Counter/ Tachometer
This circuit uses the low power ICM7555 (CMOS 555) to
generate the gating,
STORE and RESET signals as shown
in Figure 19. To provide the gating signal, the timer is con-
figured as an a stable multivibrator, using R
A
, R
B
and C to
provide an output that is positive for approximately one sec-
ond and negative for approximately 300µs - 500µs. The pos-
itive waveform time is given by t
WP
= 0.693 (R
A
+ R
B
)C
while the negative waveform is given by two = 0.693 R
B
C.
The system is calibrated by using a 5M potentiometer for
R
A
as a “coarse” control and a 1k potentiometer for R
B
as
a “fine” control. CD40106Bs are used as a monostable
multivibrator and reset time delay.
Tape Recorder Position Indicator/controller
The circuit in Figure 20 shows an application which uses the
up/down counting feature of the ICM7217 to keep track of
tape position. This circuit is representative of the many
applications of up/down counting in monitoring dimensional
position.
In the tape recorder application, the LOAD REGISTER,
EQUAL and ZERO outputs are used to control the recorder.
To make the recorder stop at a particular point on the tape,
the register can be set with the stop point and the
EQUAL
output used to stop the recorder either on fast forward, play
or rewind.
To make the recorder stop before the tape comes free of the
reel on rewind, a leader should be used. Resetting the
counter at the starting point of the tape, a few feet from the
end of the leader, allows the
ZERO output to be used to stop
the recorder on rewind, leaving the leader on the reel.
The 1M resistor and 0.0047µF capacitor on the COUNT
INPUT provide a time constant of about 5ms to debounce
the reel switch. The Schmitt trigger on the COUNT INPUT of
the ICM7217 squares up the signal before applying it to the
counter. This technique may be used to debounce
switch-closure inputs in other applications.
Precision Elapsed Time/Countdown Timer
The circuit in Figure 21 uses an ICM7213 precision one
minute/one second timebase generator using a 4.1943MHz
crystal for generating pulses counted by an ICM7217B. The
thumbwheel switches allow a starting time to be entered into
the counter for a preset-countdown type timer, and allow the
register to be set for compare functions. For instance, to
make a 24-hour clock with BCD output the register can be
preset with 2400 and the
EQUAL output used to reset the
counter. Note the 10K resistor connected between the LOAD
COUNTER terminal and Ground. This resistor pulls the
LOAD COUNTER input low when not loading, thereby
inhibiting the BCD output drivers. This resistor should be
eliminated and SW4 replaced with an SPDT center-off
switch if the BCD outputs are to be used.
This technique may be used on any 3-level input. The 100k
pullup resistor on the count input is used to ensure proper
logic voltage swing from the ICM7213. For a less expensive
(and less accurate) timebase, an ICM7555 timer may be
used in a configuration like that shown in Figure 19 to
generate a 1Hz reference.
8-Digit Up/Down Counter
This circuit (Figure 22) shows how to cascade counters and
retain correct leading zero blanking. The NAND gate detects
whether a digit is active since one of the two segments
a or b
is active on any unblanked number. The flip flop is clocked
by the least significant digit of the high order counter, and if
this digit is not blanked, the Q output of the flip flop goes high
and turns on the NPN transistor, thereby inhibiting leading
zero blanking on the low order counter.
ICM7217
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