
42 Altera Corporation
MAX 3000A Programmable Logic Device Family Data Sheet
Device
Pin–Outs
See the Altera web site (http://www.altera.com) or the Altera Digital
Library for pin–out information.
Figures 14 through 18 show the package pin–out diagrams for
MAX 3000A devices.
Figure 14. 44–Pin PLCC/TQFP Package Pin–Out Diagram
Package outlines not drawn to scale.
44-Pin PLCC
I/O
I/O
I/O
VCC
INPUT/OE2/GCLK2
INPUT/GCLRn
INPUT/OE1
INPUT/GCLK1
GND
I/O
I/O
I/O
I/O/TDO
I/O
GND
VCC
I/O
I/O
I/O/TCK
I/O
GND
I/O
I/O
I/O
I/O
I/O
GND
VCC
I/O
I/O
I/O
I/O
I/O
6 5 4 3 2 1 44 43 42 41 40
18 19 20 21 22 23 24 25 26 27 28
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
EPM3032A
EPM3064A
I/O/TDI
I/O
I/O
GND
I/O
I/O
I/O/TMS
I/O
VCC
I/O
GND
44-Pin TQFP
Pin 12 Pin 23
Pin 34
Pin 1
I/O
I/O
I/O
VCC
INPUT/OE2/GCLK2
INPUT/GCLRn
INPUT/OE1
INPUT/GCLK1
GND
I/O
I/O
I/O
I/O/TDO
I/O
GND
VCC
I/O
I/O
I/O/TCK
I/O
GND
I/O
I/O
I/O
I/O
I/O
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O/TDI
I/O
I/O
GND
I/O
I/O
I/O/TMS
I/O
VCC
I/O
GND
EPM3032A
EPM3064A