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DS90C402M

Part # DS90C402M
Description DUAL LOW VOLTAGE DIFFERENTIALSIGNALING - Rail/Tube
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

DS90C402
www.ti.com
SNLS001C JUNE 1998REVISED APRIL 2013
DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
Check for Samples: DS90C402
1
FEATURES
DESCRIPTION
The DS90C402 is a dual receiver device optimized
2
Ultra Low Power Dissipation
for high data rate and low power applications. This
Operates above 155.5 Mbps
device along with the DS90C401 provides a pair chip
Standard TIA/EIA-644
solution for a dual high speed point-to-point interface.
The device is in a PCB space saving 8 lead small
8 Lead SOIC Package saves PCB space
outline package. The receiver offers ±100 mV
V
CM
±1V center around 1.2V
threshold sensitivity, in addition to common-mode
±100 mV Receiver Sensitivity
noise protection.
Connection Diagram
See Package Number D (SOIC)
Functional Diagram
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DS90C402
SNLS001C JUNE 1998REVISED APRIL 2013
www.ti.com
Absolute Maximum Ratings
(1)(2)
Supply Voltage (V
CC
) 0.3V to +6V
Input Voltage (R
IN+
, R
IN
) 0.3V to (V
CC
+ 0.3V)
Output Voltage (R
OUT
) 0.3V to (V
CC
+ 0.3V)
D Package 1025 mW
Maximum Package Power Dissipation @ +25°C
Derate D Package 8.2 mW/°C above +25°C
Storage Temperature Range 65°C to +150°C
Lead Temperature Range
Soldering (4 sec.) +260°C
Maximum Junction Temperature +150°C
ESD Rating
(3)
(HBM, 1.5 kΩ, 100 pF) 3,500V
(EIAJ, 0 Ω, 200 pF) 250V
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. Electrical Characteristics specifies conditions of device operation.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) ESD Rating: HBM (1.5 kΩ, 100 pF) 3,500V EIAJ (0Ω, 200 pF) 250V
Recommended Operating Conditions
Min Typ Max Units
Supply Voltage (V
CC
) +4.5 +5.0 +5.5 V
Receiver Input Voltage GND 2.4 V
Operating Free Air Temperature (T
A
) 40 +25 +85 °C
Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.
(1)(2)
Symbol Parameter Conditions Pin Min Typ Max Units
V
TH
Differential Input High Threshold V
CM
= + 1.2V R
IN+
, +100 mV
R
IN
V
TL
Differential Input Low Threshold 100 mV
I
IN
Input Current V
IN
= +2.4V V
CC
= 5.5V 10 ±1 +10 μA
V
IN
= 0V 10 ± 1 +10 µA
V
OH
Output High Voltage I
OH
= 0.4 mA, V
ID
= +200 mV R
OUT
3.8 4.9 V
I
OH
= 0.4mA, Inputs terminated 3.8 4.9 V
I
OH
= 0.4mA, Inputs Open 3.8 4.9 V
I
OH
= 0.4mA, Inputs Shorted 4.9 V
V
OL
Output Low Voltage I
OL
= 2 mA, V
ID
= 200 mV 0.07 0.3 V
I
OS
Output Short Circuit Current V
OUT
= 0V
(3)
15 60 100 mA
I
CC
No Load Supply Current Inputs Open V
CC
3.5 10 mA
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified.
(2) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(3) Output short circuit current (I
OS
) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted
at a time, do not exceed maximum junction temperature specification.
2 Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS90C402
DS90C402
www.ti.com
SNLS001C JUNE 1998REVISED APRIL 2013
Switching Characteristics
V
CC
= +5.0V ± 10%, T
A
= 40°C to +85°C
(1)(2)(3)(4)(5)
Symbol Parameter Conditions Min Typ Max Units
t
PHLD
Differential Propagation Delay High to Low C
L
= 5 pF, 1.0 3.40 6.0 ns
V
ID
= 200 mV
t
PLHD
Differential Propagation Delay Low to High 1.0 3.48 6.0 ns
(Figure 1 and Figure 2)
t
SKD
Differential Skew |t
PHLD
t
PLHD
| 0 0.08 1.2 ns
t
SK1
Channel-to-Channel Skew
(3)
0 0.6 1.5 ns
t
SK2
Chip to Chip Skew
(4)
5.0 ns
t
TLH
Rise Time 0.5 2.5 ns
t
THL
Fall Time 0.5 2.5 ns
(1) All typicals are given for: V
CC
= +5.0V, T
A
= +25°C.
(2) Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, t
r
and t
f
(0%–100%) 1 ns for R
IN
.
(3) Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same
chip with an event on the inputs.
(4) Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
(5) C
L
includes probe and jig capacitance.
Parameter Measurement Information
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
Figure 2. Receiver Propagation Delay and Transition Time Waveforms
Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: DS90C402
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