DS26LV32AT

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SNLS128C –APRIL 1999–REVISED FEBRUARY 2013

DS26LV32AT 3V Enhanced CMOS Quad Differential Line Receiver

Check for Samples: DS26LV32AT

FEATURES

• Available in SOIC and CLGA Packaging

• Standard Microcircuit Drawing (SMD) 5962-

• Low Power CMOS Design (30 mW typical)

98585

• Interoperable with Existing 5V RS-422

Networks

DESCRIPTION

• Industrial and Military Temperature Range

The DS26LV32A is a high speed quad differential

• Conforms to TIA/EIA-422-B (RS-422) and ITU-T

CMOS receiver that meets the requirements of both

V.11 Recommendation

TIA/EIA-422-B and ITU-T V.11. The CMOS

DS26LV32AT features typical low static I

of 9 mA

• 3.3V Operation

which makes it ideal for battery powered and power

• ±7V Common Mode Range @ V

= 3V

conscious applications. The TRI-STATE enables, EN

• ±10V Common Mode Range @ V

= 0.2V

and EN*, allow the device to be active High or active

Low. The enables are common to all four receivers.

• Receiver OPEN Input Failsafe Feature

• Guaranteed AC Parameter:

The receiver output (RO) is guaranteed to be High

when the inputs are left open. The receiver can

– Maximum Receiver Skew: 4 ns

detect signals as low as ±200 mV over the common

– Maximum Transition Time: 10 ns

mode range of ±10V. The receiver outputs (RO) are

• Pin Compatible with DS26C32AT

compatible with TTL and LVCMOS levels.

• 32 MHz Toggle Frequency

• > 6.5k ESD Tolerance (HBM)

Connection Diagram

Top View

Figure 1.

SOIC Package

See Package Numbers D0016A or NAD0016A

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

DS26LV32AT

SNLS128C –APRIL 1999–REVISED FEBRUARY 2013

www.ti.com

Truth Table

(1)

Enables Inputs Output

EN EN* RI+–RI− RO

L H X Z

All other V

≥ +0.2V H

combinations of

≤ −0.2V L

enable inputs

Open

(2)

(1) L = Logic Low

H = Logic High

X = Irrelevant

Z = TRI-STATE

(2) Open, not terminated

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)(2)

Supply Voltage (V

) −0.5V to +7V

Enable Input Voltage (EN, EN*) −0.5V to V

+0.5V

Receiver Input Voltage (V

: RI+, RI−) ±14V

Receiver Input Voltage

(VCM: RI+, RI−) ±14V

Receiver Output Voltage (RO) −0.5V to V

+0.5V

Receiver Output Current (RO) ±25 mA Maximum

Maximum Package Power Dissipation @ +25°C

D0016A Package 1190 mW

NAD0016A Package 1087 mW

Derate D0016A Package 9.8 mW/°C above +25°C

Derate NAD0016A Package 7.3 mW/°C above +25°C

Storage Temperature Range −65°C to +150°C

Lead Temperature Range Soldering

(4 Sec.) +260°C

ESD Ratings (HBM, 1.5 kΩ, 100 pF)

Receiver Inputs and Enables ≥ 6.5 kV

Other Pins ≥ 2 kV

(1) “Absolute Maximum ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply

that the devices should be operated at these limits. The Electrical Characteristics specifies conditions of device operation.

(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

Recommended Operating Conditions

Min Typ Max Units

Supply Voltage (V

) 3.0 3.3 3.6 V

Operating Free Air Temperature Range (T

)

DS26LV32AT −40 +25 +85 °C

DS26LV32AW −55 +25 +125 °C

Product Folder Links: DS26LV32AT

DS26LV32AT

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SNLS128C –APRIL 1999–REVISED FEBRUARY 2013

Electrical Characteristics

(1) (2)

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.

Parameter Test Conditions Pin Min Typ Max Units

Differential Input Threshold V

OUT

= V

or V

= −7V to +7V, −200 ±17.5 +200 mV

= -40°C to

+85°C

RI+,

= −0.5V to -200 +200 mV

RI−

+5.5V, T

= -55°C

to +125°C

(3)

Hysteresis V

= 1.5V 35 mV

Minimum High Level Input

2.0 V

Voltage

EN,

EN*

Maximum Low Level Input

0.8 V

Voltage

Input Resistance V

= −7V, +7V, T

= -40°C to +85°C

5.0 8.5 kΩ

(Other Input = GND)

= −0.5V, +5.5V, T

= -55°C to +125°C 5.0 kΩ

(Other Input = GND)

(3)

Input Current V

= +10V T

= -40°C to 0 1.1 1.8 mA

+85°C

RI+,

(Other Input = 0V, V

= +3V 0 0.27 mA

RI−

Power On, or V

= 0.5V −0.02 mA

= 0V) V

= −3V 0 −0.43 mA

= −10V 0 −1.26 −2.2 mA

= −0.5V T

= -55°C to 0 -1.8 mA

+125°C

(3)

= 5.5V 0 1.8 mA

Input Current V

= 0V to V

EN, ±1 μA

EN*

High Level Output Voltage I

= −6 mA, V

= +1V

2.4 3 V

= −6 mA, V

= OPEN

High Level Output Voltage I

= −100 μA, V

= +1V

−0.1 V

= − 100 μA, V

= OPEN

Low Level Output Voltage I

= +6 mA, V

= −1V 0.13 0.5 V

Output TRI-STATE Leakage V

OUT

= V

or GND

±50 μA

Current

EN = V

, EN* = V

Output Short Circuit Current V

= 0V, V

≥ |200 mV|

(4)

−10 −35 −70 mA

Power Supply Current No Load, All RI+, T

= -40°C to V

9 15 mA

R1− = OPEN, EN, +85°C

EN* = V

or GND

= -55°C to 20 mA

+125°C

(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground

except V

(2) All typicals are given for: V

= +3.3V, T

= +25°C.

(3) This parameter does not meet the TIA/EIA-422-B specification.

(4) Short one output at a time to ground. Do not exceed package.

Product Folder Links: DS26LV32AT

Part #	DS26LV32ATMX
Description	3V ENHANCED CMOS QUAD DIFFERENTIAL LINE - Tape and Reel
Category	IC
Availability	Out of Stock
Qty	0

DS26LV32ATMX

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