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DS2176

Part # DS2176
Description IC BUFFER RECEIVE T1 24-DIP
Category IC
Availability In Stock
Qty 3
Qty Price
1 - 2 $17.27374
3 + $13.08617
Manufacturer Available Qty
DALLAS SEMICONDUCTOR
Date Code: 9500
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

DS2176
10 of 15
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground –1.0V to +7.0V
Operating Temperature 0°C to 70°C
Storage Temperature –55°C to +125°C
Soldering Temperature 260°C for 10 seconds
*This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of this specification is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (0°C to 70°C)
PARAMETERS SYMBOL MIN TYP MAX UNITS NOTES
Logic 1 V
IH
2.0 V
DD
+0.3 V
Logic 0 V
IL
-0.3 +0.8 V
Supply V
DD
4.5 5.5 V
DC ELECTRICAL CHARACTERISTICS (0°C to 70°C; V
DD
=5V ± 10%)
PARAMETERS SYMBOL MIN TYP MAX UNITS NOTES
Supply Current I
DD
5 10 mA 1,2
Input Leakage I
IL
-1.0 +1.0 µA
Output Current @ 2.4V I
OH
-1.0 mA 3
Output Current @ 0.4V I
OL
+4.0 mA 4
Output Leakage I
LO
-1.0 +1.0 µA 5
NOTES:
1. TCLK=RCLK=1.544 MHz.
2. Outputs open.
3. All outputs except SLIP , which is open collector.
4. All outputs.
5. Applies to SLIP when tri–stated.
CAPACITANCE (t
A
=25°C)
PARAMETERS SYMBOL MIN TYP MAX UNITS NOTES
Input Capacitance C
IN
5 pF
Output Capacitance C
out
7 pF
DS2176
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AC ELECTRICAL CHARACTERISTICS (0°C to 70°C; VDD =5V ± 10%)
PARAMETERS SYMBOL MIN TYP MAX UNITS NOTES
RCLK Period
t
RCLK 250 648 ns
RCLK, SYSCLK Rise
and Fall Times
t
R,
t
F 20 ns
RCLK Pulse Width
t
RWH,
t
RWL
125 324 ns
SYSCLK Pulse Width
t
SWH,
t
SWL
100 244 ns
SYSCLK Period
t
SYSCLK 200 488 ns
RMSYNC Setup to
RCLK Falling
t
SC 20
t
RWH
-5
ns
SFSYNC Setup to
SYSCLK Falling
t
SC 20
t
SWH
-5
ns
RMSYNC, SFSYNC,
SIGH ,ALN Pulse Width
t
PW 50 ns ns
RSER Setup to RCLK
Falling
t
SD 50 ns
RSER Hold from RCLK
Falling
t
HD 50 ns
Propagation Delay
SYSCLK to SSER,
A,B,C,D
t
PVD 100 ns
Propagation Delay
SYSCLK to SMSYNC
High
t
PSS 75 ns
Propagation Delay
SYSCLK or RCLK to
SLIP Low
t
PS 100 ns
Propagation Delay
SYSCLK to SIGFRZ
Low/High
t
PSF 75 ns
ALN , SIGH Setup to
SFSYNC Rising
t
SR 500 ns
NOTES:
1. Measured at VIH =2.0V, VIL =0.8V, and 10 ns maximum rise and fall times.
2. Output load capacitance = 100 pF.
DS2176
12 of 15
RECEIVE AC DIAGRAM Figure 9
SYSTEM AC TIMING DIAGRAM Figure 10
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