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DS1801

Part # DS1801
Description DUAL AUDIO POT DIP - Rail/Tube
Category IC
Availability In Stock
Qty 3
Qty Price
1 + $3.06344
Manufacturer Available Qty
DALLAS SEMICONDUCTOR
Date Code: 9540
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

DS1801
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TIMING DIAGRAMS Figure 3
DS1801
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CASCADE OPERATION
A feature of the DS1801 is the ability to control multiple devices from a single processor. Multiple
DS1801s can be linked or daisy-chained as shown in Figure 4. As a data bit is entered into the I/O shift
register of the DS1801, bit 0 of the I/O shift register will appear at the C
OUT
output after a maximum delay
of 50 nanoseconds.
The C
OUT
output of the DS1801 can be used to drive the D input of another DS1801. When connecting
multiple devices, the total number of bits sent is always 16 times the number of DS1801s in the daisy
chain.
An optional feedback resistor can be placed between the C OUT terminal of the last device and the D input
of the first DS1801 thus allowing the controlling processor to read as well as write data or circularly
clock data through the daisy chain. The value of the feedback or isolation resistor should be in the range
from 2 to 10 kohms.
When reading data via the C
OUT
pin and isolation resistor, the D line is left floating by the reading device.
When RST is driven high, bit 0 is present on the C
OUT
pin, which is fed back to the input D pin through
the isolation resistor. When the CLK input transitions low to high, bit 0 is loaded into the first position of
the I/O shift register and bit 1 becomes present on C
OUT
and D of the next device. After 16 bits (or 16
times the number of DS1801s in the daisy chain), the data has shifted completely around and back to its
original position. When RST transitions to the low state to end data transfer, the value (the same as before
the read occurred) is loaded into wiper-0 and wiper-1.
CASCADING MULTIPLE DEVICES Figure 4
Zero-Crossing Detection
The DS1801 provides a zero-crossing detection capability that minimizes any audible noise that may
result from sizable discrete wiper transitions when using the part in audio applications. The zero-crossing
detect feature allows independent wiper changes only when the two terminals of the potentiometer have
equal potentials and are within a 50 ms time window from the fall of the RST signal. If at 50 ms the
DS1801 has not detected a zero-crossing, the wiper position of the potentiometer(s) will change
regardless of the state of the input signal. Zero-crossing detection is activated when the
ZCEN input level
is in a low-state. When high, the ZCEN input deactivates both the 50 ms time requirement and zero
detection crossing.
DS1801
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TYPICAL SUPPLY CURRENT VS. SERIAL CLOCK RATE Figure 5
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