DS1682
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The DS1682 uses a calibrated, temperature compensated RC time base to increment an elapsed time
counter while an event is active. When the event becomes active, the contents of the non-volatile Total
Time Accumulator register are downloaded to the Elapsed Time Counter (ETC) and as the event
continues, the ETC is incremented in quarter second increments. When the event becomes inactive or the
power is removed, the DS1682 will increment the 17-bit non-volatile Event Counter register and put the
contents of the ETC into the 32-bit non-volatile Total Accumulated Time register which can hold up to
34 years of active event time. A storage cap may be required on V
CC
to provide enough power to store
the value in the ETC to the Total Time Accumulator register if power is taken away at the same time the
event ends.
When the 32-bit non-volatile Alarm Trip Point register is programmed to a non-zero number via the
2-wire bus and the AoR bit in the Configuration register set to a zero, the Alarm# output will be enabled
and the DS1682 will begin to monitor the values in the ETC for the programmed value in the Alarm Trip
Point register. Once the number in the ETC is equal to or greater than the value in the Alarm Trip Point
register, and the polarity bit is set to a zero, the Alarm# output will become active to alert the user, or
with the polarity bit set to a one, the Alarm# output will become inactive when the values match. The
DS1682 will activate the Alarm# output by pulling the pin low four times at power up, when the alarm
becomes active, or when the Alarm# pin is pulled low and released if the AOS bit is set to a 1. If the
AOS bit is a 0, the Alarm# output will be constantly low when the alarm is active.
In order to reset the device, the Reset Enable bit or the AoR bit in the Configuration register must be set
to a 1. With the Reset Enable bit set to a 1 or the AoR bit set to a 1 with the Alarm# pin held high, the
DS1682 can be reset by the Reset command sent over the 2-wire bus. If the Write Disable flag in the
Configuration register is set to a 1 by writing the Write Disable command two times, the Configuration
registers and Alarm Trip Point register will not be able to be written. If the Write Disable flag is set to a
1, the Total Time Accumulator, Elapsed Time Counter, and Event Counter will be able to be reset, if the
Reset Enable or AoR bits have been set to a 1, but the status of the Reset Enable or AoR bits will not be
able to be changed since the Configuration register is locked by the WDF being set to a 1.
The Write Memory Disable is similar to the Write Disable and is used to control the writability of the
10 bytes of EEPROM User memory. The Write Memory Disable Flag is also set to a 1 when the Write
Memory Disable command is written twice and can not be changed once it is set to a 1. If the Write
Memory Disable bit is set to a 1, the 10 bytes of memory will not be able to be written or erased. If the
Write Memory Disable bit is a 0, the user will have full access to the bytes with the standard EEPROM
write time restrictions. If the Write Disable is a 0, the device is fully writable or erasable except for the
User Memory and the Write Memory Disable flag, which are only controlled by the Write Memory
Disable command. With both the Write Disable and Write Memory Disable set to 1’s, the only inputs
that will be accessible are the Reset command if it is enabled, the Event input and the Alarm#
input/output. The rest of the part will be read only.
When data is written to the device, the device slave address will be sent first followed by the address
pointer and the desired byte of data. Once a single byte of data is sent, there must be at least 200 mS to
allow the EEPROM to update the data.
OVERVIEW
The block diagram in Figure 1 shows the relationship between the major control and memory I/O sections
of the DS1682. The device has three major components: 1) clock generator and control blocks, 2)
elapsed time counter and accumulator registers, and 3) 2-wire interface.
