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DM74LS299N

Part # DM74LS299N
Description Counter Shift Registers 8-Input Sft/Stor Reg
Category IC
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National Semiconductor Corp
Date Code: 9542
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

© 2000 Fairchild Semiconductor Corporation DS009827 www.fairchildsemi.com
October 1988
Revised March 2000
DM74LS299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins
DM74LS299
8-Input Universal Shift/Storage Register with
Common Parallel I/O Pins
General Description
The DM74LS299 is an 8-bit universal shift/storage register
with 3-STATE outputs. Four modes of operation are possi-
ble: hold (store), shift left, shift right and load data. The par-
allel load inputs and flip-flop outputs are multiplexed to
reduce the total number of package pins. Separate outputs
are provided for flip-flops Q0 and Q7 to allow easy cascad-
ing. A separate active LOW Master Reset is used to reset
the register.
Features
Common I/O for reduced pin count
Four operation modes: shift left, shift right, load and
store
Separate shift right serial input and shift left serial input
for easy cascading
3-STATE outputs for bus oriented applications
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
V
CC
= Pin 20
GND = Pin 10
Pin Descriptions
Connection Diagram
Order Number Package Number Package Description
DM74LS299WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS299N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin
Names
Description
CP Clock Pulse Input (Active Rising Edge)
D
S0
Serial Data Input for Right Shift
D
S7
Serial Data Input for Left Shift
S0, S1 Mode Select Inputs
MR
Asynchronous Master Reset Input (Active LOW)
OE
1, OE2 3-STATE Output Enable Inputs (Active LOW)
I/O0–I/O7 Parallel Data Inputs or 3-STATE Parallel Outputs
Q0–Q7 Serial Outputs
www.fairchildsemi.com 2
DM74LS299
Functional Description
The DM74LS299 contains eight edge-triggered D-type flip-
flops and the interstage logic necessary to perform syn-
chronous shift left, shift right, parallel load and hold opera-
tions. The type of operation is determined by the S0 and
S1, as shown in the Mode Select Table. All flip-flop outputs
are brought out through 3-STATE buffers to separate I/O
pins that also serve as data inputs in the parallel load
mode. Q0 and Q7 are also brought out on other pins for
expansion in serial shifting of longer words.
A LOW signal on MR
overrides the Select and CP inputs
and resets the flip-flops. All other state changes are initi-
ated by the rising edge of the clock. Inputs can change
when the clock is in either state provided only that the rec-
ommended setup and hold times, relative to the rising edge
of CP, are observed.
A HIGH signal on either OE
1 or OE2 disables the 3-STATE
buffers and puts the I/O pins in the high impedance state.
In this condition the shift, hold, load and reset operations
can still occur. The 3-STATE buffers are also disabled by
HIGH signals on both S0 and S1 in preparation for a paral-
lel load operation.
Mode Select Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock (CP) Transition
Logic Diagram
Inputs
Response
MR
S1 S0 CP
LXXXAsynchronous Reset; Q0–Q7 = LOW
HHH
Parallel Load; I/O
n
Q
n
HLH Shift Right; D
S0
Q0, Q0Q1, etc.
HHL
Shift Left; D
S7
Q7, Q7Q6, etc.
H L L X Hold
3 www.fairchildsemi.com
DM74LS299
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range 65°C to +150°C
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.75 5 5.25 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current Q0, Q7 0.4 mA
I/O0–I/O7 2.6 mA
I
OL
LOW Level Output Current Q0, Q7 8 mA
I/O0–I/O7 24 mA
T
A
Free Air Operating Temperature 0 70 °C
t
S
(H) Setup Time HIGH or LOW 24
ns
t
S
(L) S0 or S1 to CP 24
t
H
(H) Hold Time HIGH or LOW 0
ns
t
H
(L) S0 or S1 to CP 0
t
S
(H) Setup Time HIGH or LOW 10
ns
t
S
(L) I/O
n
, D
S0
, D
S7
to CP 10
t
H
(H) Hold Time HIGH or LOW 0
ns
t
H
(L) I/O
n
, D
S0
, D
S7
to CP 0
t
W
(H) CP Pulse Width HIGH or LOW 15
ns
t
W
(L) 15
t
W
(L) MR Pulse Width LOW 15 ns
t
REC
Recovery Time
10 ns
MR
to CP
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