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DM74123N

Part # DM74123N
Description Monostable Multivibrator DualRetrig One Shot
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

© 2000 Fairchild Semiconductor Corporation DS006539 www.fairchildsemi.com
August 1986
Revised March 2000
DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs
DM74123
Dual Retriggerable One-Shot with
Clear and Complementary Outputs
General Description
The DM74123 is a dual retriggerable monostable multi-
vibrator capable of generating output pulses from a few
nano-seconds to extremely long duration up to 100% duty
cycle. Each device has three inputs permitting the choice of
either leading-edge or trailing edge triggering. Pin (A) is an
active-LOW transition trigger input and pin (B) is an active-
HIGH transition trigger input. A LOW at the clear (CLR)
input terminates the output pulse: which also inhibits trig-
gering. An internal connection from CLR to the input gate
makes it possible to trigger the circuit by a positive-going
signal on CLR as shown in the Truth Table.
To obtain the best and trouble free operation from this
device please read the Operating Rules as well as the
One–Shot Application Notes carefully and observe recom-
mendations.
Features
DC triggered from active-HIGH transition or active-LOW
transition inputs
Retriggerable to 100% duty cycle
Direct reset terminates output pulse
Compensated for V
CC
and temperature variations
DTL, TTL compatible
Input clamp diodes
Ordering Code:
Connection Diagram Triggering Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Functional Description
The basic output pulse width is determined by selection of
an external resistor (R
X
) and capacitor (C
X
). Once trig-
gered, the basic pulse width may be extended by retrigger-
ing the gated active-LOW transition or active-HIGH
transition inputs or be reduced by use of the active-LOW
transition clear input. Retriggering to 100% duty cycle is
possible by application of an input pulse train whose cycle
time is shorter than the output cycle time such that a con-
tinuous “HIGH” logic state is maintained at the “Q” output.
Order Number Package Number Package Description
DM74123N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Response
ABCLR
X X L No Trigger
L X No Trigger
H H Trigger
H
X No Trigger
L
H Trigger
LH
Trigger
www.fairchildsemi.com 2
DM74123
Operating Rules
1. An external resistor (R
X
) and external capacitor (C
X
)
are required for proper operation. The value of C
X
may
vary from 0 to any necessary value. For small time con-
stants high-grade mica, glass, polypropylene, polycar-
bonate, or polystyrene material capacitors may be
used. For large time constants use tantalum or special
aluminum capacitors. If the timing capacitors have
leakages approaching 100 nA or if stray capacitance
from either terminal to ground is greater than 50 pF the
timing equations may not represent the pulse width the
device generates.
2. When an electrolytic capacitor is used for C
X
a switch-
ing diode is often required for standard TTL one-shots
to prevent high inverse leakage current (Figure 1).
However, its use in general is not recommended with
retriggerable operation.
3. The output pulse width (T
W
) for C
X
> 1000 pF is
defined as follows:
T
W
= K R
X
C
X
(1 + 0.7/R
X
)
1. where: [R
X
is in Kilo-ohm]
[C
X
is in pico Farad]
[T
W
is in nano second]
[K 0.28]
FIGURE 1.
4. For C
X
< 1000 pF see Figure 2 for T
W
vs. C
X
family curves with R
X
as a parameter:
Pulse Width vs. R
X
and C
X
FIGURE 2.
5. To obtain variable pulse width by remote trim-
ming, the following circuit is recommended:
Note: “R
remote
” should be as close to the one-shot as possible.
FIGURE 3.
6. The retriggerable pulse width is calculated as
shown below:
T = T
W
+ t
PLH
= K× R
X
× C
X
+ t
PLH
The retriggered pulse width is equal to the
pulse width plus a delay time period (Figure
4).
FIGURE 4.
7. Under any operating condition C
X
and R
X
must be kept as close to the one-shot device
pins as possible to minimize stray capaci-
tance, to reduce noise pick-up, and to reduce
I × R and Ldi/dt voltage developed along their
connecting paths. If the lead length from C
X
to
pins (6) and (7) or pins (14) and (15) is greater
than 3 cm, for example, the output pulse width
might be quite different from values predicted
from the appropriate equations. A non-induc-
tive and low capacitive path is necessary to
ensure complete discharge of C
X
in each
cycle of its operation so that the output pulse
width will be accurate.
8. V
CC
and ground wiring should conform to
good high-frequency standards and practices
so that switching transients on the V
CC
and
ground return leads do not cause interaction
between one-shots. A 0.01 µF to 0.10 µF
bypass capacitor (disk ceramic or monolithic
type) from V
CC
to ground is necessary on
each device. Furthermore, the bypass capaci-
tor should be located as close to the V
CC
pin
as space permits.
Note: For further detailed device characteristics and output performance
please refer to the One-Shot Application Note, AN-366.
3 www.fairchildsemi.com
DM74123
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 2: T
A
= 25°C and V
CC
= 5V.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 3: All typicals are at V
CC
= 5V, T
A
= 25°C.
Note 4: Not more than one output should be shorted at a time.
Note 5: Quiescent I
CC
is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs OPEN, C
EXT
= 0.02 µF,
and R
EXT
= 25 K.
Note 6: I
CC
is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs OPEN, C
EXT
= 0.02 µF,
and R
EXT
= 25 k.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature 65°C to +150°C
Symbol Parameter Min Nom Max Units
V
CC
Supply Voltage 4.75 5 5.25 V
V
IH
HIGH Level Input Voltage 2 V
V
IL
LOW Level Input Voltage 0.8 V
I
OH
HIGH Level Output Current 0.8 mA
I
OL
LOW Level Output Current 16 mA
t
W
Pulse Width A or B HIGH 40
(Note 2) A or B LOW 40 ns
Clear LOW 40
T
WQ
Minimum Width of
A or B 65 ns
(Min) Pulse at Q (Note 2)
R
EXT
External Timing Resistor 5 50 k
C
EXT
External Timing Capacitance No Restriction µF
C
WIRE
Wiring Capacitance
50 pF
at R
EXT
/C
EXT
Terminal (Note 2)
T
A
Free Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min
Typ
Max Units
(Note 3)
V
I
Input Clamp Voltage V
CC
= Min, I
I
= 12 mA 1.5 V
V
OH
HIGH Level V
CC
= Min, I
OH
= Max
2.5 3.4 V
Output Voltage V
IL
= Max, V
IH
= Min
V
OL
LOW Level V
CC
= Min, I
OL
= Max
0.2 0.4 V
Output Voltage V
IH
= Min, V
IL
= Max
I
I
Input Current @ Max Input Voltage V
CC
= Max, V
I
= 5.5V 1 mA
I
IH
HIGH Level V
CC
= Max Data 40
µA
Input Current V
I
= 2.4V Clear 80
I
IL
Low Level V
CC
= Max, V
I
= 0.4V Clear 3.2
mA
Input Current Data 1.6
I
OS
Short Circuit Output Current V
CC
= Max (Note 4) 10 40 mA
I
CC
Supply Current V
CC
= Max (Note 5)(Note 6) 46 66 mA
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