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CS496122-CQZ

Part # CS496122-CQZ
Description 16X16 IC W/DSP C-NET INTERFACE PROC
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

CobraNet Hardware User’s Manual
Features
DS651UM23 ©Copyright 2005 Cirrus Logic, Inc. 7
Version 2.3
2.3 Host Interface
8-bit Data, 4-bit Address
Virtual 24-bit Addressing with 32-bit Data
Polled, Interrupt, and DMA Modes of Operation
Configure and Monitor CobraNet Interface
Transmit or Receive Ethernet Packets at Near-100-Mbit Wire Speed
2.4 Asynchronous Serial Interface
Full-duplex Capable
8-bit Data Format
Supports all Standard Baud Rates
2.5 Synchronous Serial Audio Interface
Up to Four Bi-directional Interfaces Supporting up to 32 Channels of Audio I/O
64FS (3.072 MHz) Bit Rate for CS18100x/CS49610x and CS18101x/
CS49611x
128FS (6.144 MHz) Bit Rate for CS18102x/CS49612x
Accommodates Many Synchronous Serial Formats Including I
2
S
32-bit Data Resolution on All Audio I/O
2.6 Audio Clock Interface
5 Host Audio-clocking Modes for Maximum Flexibility in Digital Audio Interface
Design
Low-jitter Master Audio Clock Oscillator (24.576 MHz)
Synchronize to Supplied Master and/or Sample Clock
Sophisticated jitter attenuation assures network perturbations do not affect
audio performance.
2.7 Audio Routing and Processing
Single-channel Granularity in Routing From Synchronous Serial Audio
Interface to CobraNet Network
Two levels of inward audio routing affords flexibility in audio I/O interface design
in the host system.
Local Audio Loopback and Output Duplication Capability
Peak-read Audio Metering with Ballistics
8 ©Copyright 2005 Cirrus Logic, Inc. DS651UM23
Version 2.3
CobraNet Hardware User’s Manual
Hardware
3.0 Hardware
Figure 2 shows a high-level view of the CobraNet CM-2 interface hardware architecture.
Figure 2. CobraNet Interface Hardware Block Diagram
Flash memory holds the CobraNet firmware and management interface variable settings.
The CS1810xx or CS4961xx network processor is the heart of the CobraNet interface. It
implements the network protocol stacks and performs the synchronous-to-isochronous
and isochronous-to-synchronous conversions. The network processor has a role in
sample clock regeneration and performs all interactions with the host system.
The sample clock is generated by a voltage-controlled crystal oscillator (VCXO)
controlled by the network processor. The VCXO frequency is carefully adjusted to achieve
lock with the network clock.
The Ethernet controller is a standard interface chip that implements the 100-Mbit Fast
Ethernet standard. As per Ethernet requirements the interface is transformer isolated.
VCXO
Ethernet
Magnetics
Clock
Audio
Serial
Host
Control
Clock
CobraNet CM-2
Module
Flash
Memory
Ethernet
Controller
CS1810xx/
CS4961xx
CobraNet Hardware User’s Manual
Pinout and Signal Descriptions
DS651UM23 ©Copyright 2005 Cirrus Logic, Inc. 9
Version 2.3
4.0 Pinout and Signal Descriptions
This section details the chip pinout and signal interfaces for each module and is divided
as follows:
"CS1810xx & CS4961xx Package Pinouts" on page 10
"Host Port Signals" on page 12
"Asynchronous Serial Port (UART Bridge) Signals" on page 12
"Synchronous Serial (Audio) Signals" on page 13
"Audio Clock Signals" on page 13
"Miscellaneous Signals" on page 14
"Power and Ground Signals" on page 14
"System Signals" on page 15
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