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CS4350-CZZ

Part # CS4350-CZZ
Description DAC DUAL DELTA-SIGMA 24BIT 24TSSOP - Rail/Tube
Category IC
Availability In Stock
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CIRRUS LOGIC
Date Code: 1111
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
http://www.cirrus.com
192 kHz Stereo DAC with Integrated PLL
Features
Advanced Multi-bit Delta-Sigma Architecture
109 dB Dynamic Range
-91 dB THD+N
24-Bit Conversion
Supports Audio Sample Rates Up to 192 kHz
Low-Latency Digital Filtering
Single-Ended or Differential Analog Output
Architecture
Integrated PLL Locks to Incoming Left-Right
Clock
Eliminates the Need for External Master-
clock Routing
Reduces Interference and Jitter Sensitivity
No External Loop Filter Components
Required
Automatic Sample-Rate Range Detection
Popguard
®
Technology for Control of Clicks
and Pops
Hardware Popguard Disable for Fast
Startups
Supports All Standard Serial Audio Formats
Including Time-Division Multiplexed (TDM)
+1.5 V to 5.0 V Logic Supplies for Serial Port
+3.3 V to 5.0 V Control Port Interface
Control Port Mode Features
SPI™ and I²C
®
Modes
ATAPI Mixing
Mute Control for Individual Channels
Digital Volume Control with Soft Ramp
127.5 dB Attenuation
1/2 dB Step Size
Zero Crossing Click-Free Transitions
PCM
Serial
Interface
Serial Audio Input
Right
Channel
Output
Left
Channel
Output
Reset
3.3 V to 5.0 V
Register/
Hardware
Configuration
Hardware or I
2
C/
SPI Control Data
3.3 V to 5.0 V
LRCK
RMCK
RMCK
Recovered MCLK
1.5 V to 5.0 V
Internal Voltage
Reference
and Regulation
Phase Locked Loop
Interpolation
Filter with
Volume
Control
Interpolation
Filter with
Volume
Control
Multibit ΔΣ
Modulator
Multibit ΔΣ
Modulator
Level Translator Level Translator
Amp
+
Filter
Amp
+
Filter
Left and
Right Mute
Controls
External
Mute
Control
DAC
DAC
JULY '07
DS691F1
CS4350
2 DS691F1
CS4350
Description
The CS4350 is a complete stereo digital-to-analog system including PLL-based master clock derivation, digital in-
terpolation, 5th-order multi-bit delta-sigma digital-to-analog conversion, digital de-emphasis, volume control,
channel mixing, and analog filtering. The advantages of this architecture include ideal differential linearity, no dis-
tortion mechanisms due to resistor matching errors, no linearity drift over time and temperature, high tolerance to
clock jitter, and a minimal set of external components.
The CS4350 supports all standard digital audio interface formats, including TDM.
The CS4350 is available in a 24-pin TSSOP package in both Commercial (-40° to +85°C) and Automotive grades
(-40° to +105°C). The CDB4350 Customer Demonstration board is also available for device evaluation and imple-
mentation suggestions. Please refer to “Ordering Information” on page 40 for complete ordering information.
These features are ideal for cost-sensitive, two-channel audio systems, including DVD players and recorders, set-
top boxes, digital TVs, mini-component systems, mixing consoles and automotive audio systems.
DS691F1 3
CS4350
TABLE OF CONTENTS
1. PIN DESCRIPTION.................................................................................................................................. 6
2. CHARACTERISTICS AND SPECIFICATIONS....................................................................................... 8
RECOMMENDED OPERATING CONDITIONS .......................................................................................... 8
ABSOLUTE MAXIMUM RATINGS............................................................................................................... 8
DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CZZ) ................................................................... 9
DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DZZ) .................................................................. 10
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE............................................ 12
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE.............................................................. 13
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT.................................................... 14
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT................................................... 15
DIGITAL CHARACTERISTICS .................................................................................................................. 16
POWER AND THERMAL CHARACTERISTICS........................................................................................ 16
3. TYPICAL CONNECTION DIAGRAM .................................................................................................. 17
4. APPLICATIONS .................................................................................................................................... 18
4.1 Sample Rate Range and Oversampling Mode Detect................................................................... 18
4.1.1 Sample Rate Auto-Detect .................................................................................................... 18
4.2 System Clocking ............................................................................................................................ 18
4.2.1 Recovered Master Clock (RMCK)........................................................................................ 18
4.3 Digital Interface Format ................................................................................................................. 19
4.3.1 Time-Division Multiplex (TDM) Mode ................................................................................... 20
4.4 De-Emphasis ................................................................................................................................. 21
4.5 Mute Control .................................................................................................................................. 21
4.6 Recommended Power-Up Sequence ............................................................................................ 21
4.6.1 Stand-Alone Mode ............................................................................................................... 21
4.6.2 Control Port Mode ................................................................................................................ 22
4.7 Popguard Transient Control .......................................................................................................... 22
4.7.1 Power-Up ............................................................................................................................. 22
4.7.2 Power-Down......................................................................................................................... 22
4.7.3 Discharge Time .................................................................................................................... 22
4.8 Analog Output and Filtering........................................................................................................... 23
4.9 Grounding and Power Supply Arrangements ................................................................................ 23
4.9.1 Capacitor Placement............................................................................................................ 23
5. STAND-ALONE OPERATION............................................................................................................... 24
5.1 Serial Port Format Selection.......................................................................................................... 24
5.2 De-Emphasis Control .................................................................................................................... 24
5.3 Popguard Transient Control .......................................................................................................... 24
6. CONTROL PORT OPERATION ............................................................................................................ 25
6.1 MAP Auto Increment ..................................................................................................................... 25
6.2 I²C Mode........................................................................................................................................ 25
6.2.1 I²C Write ............................................................................................................................... 25
6.2.2 I²C Read............................................................................................................................... 25
6.3 SPI Mode....................................................................................................................................... 26
6.3.1 SPI Write .............................................................................................................................. 26
6.3.2 SPI Read.............................................................................................................................. 27
6.4 Memory Address Pointer (MAP) ................................................................................................... 27
6.4.1 INCR (Auto Map Increment Enable) .................................................................................... 27
6.4.2 MAP (Memory Address Pointer) .......................................................................................... 27
7. REGISTER QUICK REFERENCE ......................................................................................................... 28
8. REGISTER DESCRIPTION ................................................................................................................... 29
8.1 Device and Revision ID - Register 01h.......................................................................................... 29
8.2 Mode Control - Register 02h ......................................................................................................... 29
8.2.1 Digital Interface Format (DIF[2:0]) Bits 6-4 .......................................................................... 29
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