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CS4344-CZZ

Part # CS4344-CZZ
Description DAC DUAL DELTA-SIGMA 24BIT 10TSSOP - Rail/Tube
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

CS4344/5/6/8
16 DS613PP2
USER: Apply Power
Wait State
USER: Apply LRCK
MCLK/LRCK Ratio Detection
USER: Applied SCLK
USER: Remove
LRCK
USER: change
MCLK/LRCK ratio
SCLK mode = internal
SCLK mode = external
Normal Operation
De-emphasis
available
Analog Output
is Generated
Normal Operation
De-emphasis
not available
Analog Output
is Generated
USER: change
MCLK/LRCK ratio
USER: Remove
MCLK
USER: Remove
LRCK
USER: Remove
MCLK
USER: Apply MCLK
Power-Down State
VQ and outputs low
VQ and outputs
ramp down
VQ and outputs
ramp down
VQ and outputs ramp up
USER: No SCLK
Figure 12. CS4344/5/6/8 Initialization and Power-Down Sequence
CS4344/5/6/8
DS613PP2 17
When changing clock ratio or sample rate it is recommended that zero data (or near zero data) be present
on SDIN for at least 10 LRCK samples before the change is made. During the clocking change the DAC
outputs will always be in a zero data state. If no zero audio is present at the time of switching, a slight click
or pop may be heard as the DAC output automatically goes to it’s zero data state.
4.6 Grounding and Power Supply Decoupling
As with any high resolution converter, the CS4344 family requires careful attention to power supply and
grounding arrangements to optimize performance. Figure 6 shows the recommended power arrangement
with VA connected to a clean +3.3 V or +5 V supply. For best performance, decoupling and filter capaci-
tors should be located as close to the device package as possible with the smallest capacitors closest.
4.7 Analog Output and Filtering
The analog filter present in the CS4344 family is a switched-capacitor filter followed by a continuous time
low pass filter. Its response, combined with that of the digital interpolator, is given in Figures 13 - 20. The
recommended external analog circuitry is shown in the “Typical Connection Diagram” on page 11.
CS4344/5/6/8
18 DS613PP2
5.PARAMETER DEFINITIONS
Total Harmonic Distortion + Noise (THD+N)
The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified
bandwidth (typically 10 Hz to 20 kHz), including distortion components. Expressed in decibels.
Dynamic Range
The ratio of the full scale rms value of the signal to the rms sum of all other spectral components over the
specified bandwidth. Dynamic range is a signal-to-noise measurement over the specified bandwidth
made with a -60 dBFS signal. 60 dB is then added to the resulting measurement to refer the measurement
to full scale. This technique ensures that the distortion components are below the noise level and do not
effect the measurement. This measurement technique has been accepted by the Audio Engineering So-
ciety, AES17-1991, and the Electronic Industries Association of Japan, EIAJ CP-307.
Interchannel Isolation
A measure of crosstalk between the left and right channels. Measured for each channel at the converter's
output with all zeros to the input under test and a full-scale signal applied to the other channel. Units in
decibels.
Interchannel Gain Mismatch
The gain difference between left and right channels. Units in decibels.
Gain Error
The deviation from the nominal full scale analog output for a full scale digital input.
Gain Drift
The change in gain value with temperature. Units in ppm/°C.
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