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CD54HC10F3A

Part # CD54HC10F3A
Description TRIPLE 3-IN POS-NAND GATE - Rail/Tube
Category IC
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Date Code: 9106
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1
Data sheet acquired from Harris Semiconductor
SCHS128C
Features
Buffered Inputs
Typical Propagation Delay: 8ns at V
CC
= 5V,
C
L
= 15pF, T
A
= 25
o
C
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
1µA at V
OL
, V
OH
Description
The ’HC10 and ’HCT10 logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The HCT logic family is functionally pin
compatible with the standard LS logic family.
Pinout
CD54HC10, CD54HCT10
(CERDIP)
CD74HC10, CD74HCT10
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD54HC10F3A -55 to 125 14 Ld CERDIP
CD54HCT10F3A -55 to 125 14 Ld CERDIP
CD74HC10E -55 to 125 14 Ld PDIP
CD74HC10M -55 to 125 14 Ld SOIC
CD74HC10MT -55 to 125 14 Ld SOIC
CD74HC10M96 -55 to 125 14 Ld SOIC
CD74HCT10E -55 to 125 14 Ld PDIP
CD74HCT10M -55 to 125 14 Ld SOIC
CD74HCT10MT -55 to 125 14 Ld SOIC
CD74HCT10M96 -55 to 125 14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
1A
1B
2A
2B
2C
2Y
GND
V
CC
1C
1Y
3C
3B
3A
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
August 1997 - Revised September 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC10, CD74HC10,
CD54HCT10, CD74HCT10
High-Speed CMOS Logic
Triple 3-Input NAND Gate
[
/Title
(
CD74
H
C10,
C
D74
H
CT10
)
/
Sub-
j
ect
(
High
S
peed
C
MOS
L
ogic
T
riple
3
-Input
N
AND
G
ate)
/
Autho
r
()
/
Key-
w
ords
(
High
S
peed
C
MOS
L
ogic
T
riple
3
-Input
N
AND
G
ate,
H
igh
S
peed
C
MOS
L
ogic
T
riple
3
-Input
N
AND
G
ate,
H
arris
S
emi-
2
Functional Diagram
Logic Symbol
TRUTH TABLE
INPUTS OUTPUT
nA nB nC nY
LLLH
LLHH
LHLH
LHHH
HLLH
HLHH
HHLH
HHHL
H = High Voltage Level, L = Low Voltage Level
1A
1B
2B
2C
2Y
GND
1
2
3
4
5
6
14
13
12
11
V
CC
3C
3Y
3B
1Y
1C
10
8
7
9
3A
2A
nA
nC
nY
nB
CD54HC10, CD74HC10, CD54HCT10, CD74HCT10
3
Absolute Maximum Ratings Thermal Information
DC Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC V
CC
or Ground Current, I
CC or
I
GND
. . . . . . . . . . . . . . . . . .±50mA
Operating Conditions
Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . 0V to V
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
Thermal Resistance (Typical, Note 1) θ
JA
(
o
C/W)
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSV
I
(V) I
O
(mA) MIN TYP MAX MIN MAX MIN MAX
HC TYPES
High Level Input
Voltage
V
IH
- - 2 1.5 - - 1.5 - 1.5 - V
4.5 3.15 - - 3.15 - 3.15 - V
6 4.2 - - 4.2 - 4.2 - V
Low Level Input
Voltage
V
IL
- - 2 - - 0.5 - 0.5 - 0.5 V
4.5 - - 1.35 - 1.35 - 1.35 V
6 - - 1.8 - 1.8 - 1.8 V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or
V
IL
-0.02 2 1.9 - - 1.9 - 1.9 - V
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
-0.02 6 5.9 - - 5.9 - 5.9 - V
High Level Output
Voltage
TTL Loads
---------V
-4 4.5 3.98 - - 3.84 - 3.7 - V
-5.2 6 5.48 - - 5.34 - 5.2 - V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or
V
IL
0.02 2 - - 0.1 - 0.1 - 0.1 V
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
0.02 6 - - 0.1 - 0.1 - 0.1 V
Low Level Output
Voltage
TTL Loads
---------V
4 4.5 - - 0.26 - 0.33 - 0.4 V
5.2 6 - - 0.26 - 0.33 - 0.4 V
Input Leakage
Current
I
I
V
CC
or
GND
-6--±0.1 - ±1-±1 µA
CD54HC10, CD74HC10, CD54HCT10, CD74HCT10
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