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CC1000-RTB1

Part # CC1000-RTB1
Description RF Transceiver FSK 3V 28-PinTSSOP Tube - Rail/Tube
Category IC
Availability In Stock
Qty 143
Qty Price
1 - 15 $9.51472
16 - 39 $7.56853
40 - 77 $7.13604
78 - 116 $6.63147
117 + $5.91066
Manufacturer Available Qty
Texas Instruments
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

CC1000
SWRS048A Page 43 of 55
LOCK Register (0Dh)
REGISTE
R
NAME Default
value
Active Description
LOCK[7:4] LOCK_SELECT[3:0] 0000 - Selection of signals to CHP_OUT (LOCK) pin
0000 : Normal, pin can be used as CHP_OUT
0001 : LOCK_CONTINUOUS (active high)
0010 : LOCK_INSTANT (active high)
0011 : ALARM_H (active high)
0100 : ALARM_L (active high)
0101 : CAL_COMPLETE (active high)
0110 : IF_OUT
0111 : REFERENCE_DIVIDER Output
1000 : TX_PDB (active high, activates external PA
when TX_PD=0)
1001 : Manchester Violation (active high)
1010 : RX_PDB (active high, activates external
LNA when RX_PD=0)
1011 : Not defined
1100 : Not defined
1101 : LOCK_AVG_FILTER
1110 : N_DIVIDER Output
1111 : F_COMP
LOCK[3] PLL_LOCK_
ACCURACY
0 - 0 : Sets Lock Threshold = 127, Reset Lock
Threshold = 111. Corresponds to a worst case
accuracy of 0.7%
1 : Sets Lock Threshold = 31, Reset Lock
Threshold =15. Corresponds to a worst case
accuracy of 2.8%
LOCK[2] PLL_LOCK_
LENGTH
0 -
0 : Normal PLL lock window
1 : Not used
LOCK[1] LOCK_INSTANT - - Status bit from Lock Detector
LOCK[0] LOCK_CONTINUOUS - - Status bit from Lock Detector
CAL Register (0Eh)
REGISTER NAME Default
value
Active Description
CAL[7] CAL_START 0
1 : Calibration started
0 : Calibration inactive
CAL_START must be set to 0 after
calibration is done
CAL[6] CAL_DUAL 0 H 1 : Store calibration in both A and B
0 : Store calibration in A or B defined by
MAIN[6]
CAL[5] CAL_WAIT 0 H 1 : Normal Calibration Wait Time
0 : Half Calibration Wait Time
The calibration time is proportional to the
internal reference frequency. 2 MHz
reference frequency gives 14 ms wait time.
CAL[4] CAL_CURRENT 0 H 1 : Calibration Current Doubled
0 : Normal Calibration Current
CAL[3] CAL_COMPLETE 0 H Status bit defining that calibration is
complete
CAL[2:0] CAL_ITERATE 101 H Iteration start value for calibration DAC
000 – 101: Not used
110 : Normal start value
111 : Not used
CC1000
SWRS048A Page 44 of 55
MODEM2 Register (0Fh)
REGISTER NAME Default
value
Active Description
MODEM2[7] PEAKDETECT 1 H Peak Detector and Remover disabled or
enabled
0 : Peak detector and remover is
disabled
1 : Peak detector and remover is
enabled
MODEM2[6:0] PEAK_LEVEL_OFFSET[6:0] 0010110 - Threshold level for Peak Remover in
Demodulator. Correlated to frequency
deviation, see note.
Note: PEAK_LEVEL_OFFSET[6:0] =
8
5
2
+
f
IF
Fs
IF
Fs
low
low
where
1_
_
+
=
FREQXOSC
xoscf
Fs
and
accuracyXTALrffkHzIF
low
__2150
=
and f is the separation
MODEM1 Register (10h)
REGISTER NAME Default
value
Active Description
MODEM1[7:5] MLIMIT 011 - Sets the limit for the Manchester Violation Flag.
A Manchester Value = 14 is a perfect bit and a
Manchester Value = 0 is a constant level (an
unbalanced corrupted bit)
000 : No Violation Flag is set
001 : Violation Flag is set for Manchester Value < 1
010 : Violation Flag is set for Manchester Value < 2
011 : Violation Flag is set for Manchester Value < 3
100 : Violation Flag is set for Manchester Value < 4
101 : Violation Flag is set for Manchester Value < 5
110 : Violation Flag is set for Manchester Value < 6
111 : Violation Flag is set for Manchester Value < 7
MODEM1[4] LOCK_AVG_IN 0 H Lock control bit of Average Filter
0 : Average Filter is free-running
1 : Average Filter is locked
MODEM1[3] LOCK_AVG_MODE 0 - Automatic lock of Average Filter
0 : Lock of Average Filter is controlled automatically
1 : Lock of Average Filter is controlled by
LOCK_AVG_IN
MODEM1[2:1] SETTLING[1:0] 11 - Settling Time of Average Filter
00 : 11 baud settling time, worst case 1.2dB loss in
sensitivity
01 : 22 baud settling time, worst case 0.6dB loss in
sensitivity
10 : 43 baud settling time, worst case 0.3dB loss in
sensitivity
11 : 86 baud settling time, worst case 0.15dB loss in
sensitivity
MODEM1[0] MODEM_RESET_N 1 L Separate reset of MODEM
CC1000
SWRS048A Page 45 of 55
MODEM0 Register (11h)
REGISTER NAME Default
value
Active Description
MODEM0[7] - - - Not used
MODEM0[6:4] BAUDRATE[2:0] 010 - 000 : 0.6 kBaud
001 : 1.2 kBaud
010 : 2.4 kBaud
011 : 4.8 kBaud
100 : 9.6 kBaud
101 : 19.2, 38.4 and 76.8 kBaud
110 : Not used
111 : Not used
MODEM0[3:2] DATA_FORMAT[1:0] 01 - 00 : NRZ operation.
01 : Manchester operation
10 : Transparent Asyncronous UART operation
11 : Not used
MODEM0[1:0] XOSC_FREQ[1:0] 00 - Selection of XTAL frequency range
00 : 3MHz – 4MHz crystal, 3.6864MHz
recommended
Also used for 76.8 kBaud, 14.7456MHz
01 : 6MHz – 8MHz crystal, 7.3728MHz
recommended
Also used for 38.4 kBaud, 14.7456MHz
10 : 9MHz – 12MHz crystal, 11.0592 MHz
recommended
11 : 12MHz – 16MHz crystal, 14.7456MHz
recommended
MATCH Register (12h)
REGISTER NAME Default
value
Active Description
MATCH[7:4] RX_MATCH[3:0] 0000 - Selects matching capacitor array value for
RX, step size is 0.4 pF
0001: Use for RF frequency > 500 MHz
0111: Use for RF frequency < 500 MHz
MATCH[3:0] TX_MATCH[3:0] 0000 - Selects matching capacitor array value for
TX, step size is 0.4 pF
FSCTRL Register (13h)
REGISTER NAME Default
value
Active Description
FSCTRL[7:4] - - - Not used
FSCTRL[3:1] Reserved
FSCTRL[0] FS_RESET_N 1 L
Separate reset of frequency synthesizer
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