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CC1000-RTB1

Part # CC1000-RTB1
Description RF Transceiver FSK 3V 28-PinTSSOP Tube - Rail/Tube
Category IC
Availability In Stock
Qty 143
Qty Price
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16 - 39 $7.56853
40 - 77 $7.13604
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117 + $5.91066
Manufacturer Available Qty
Texas Instruments
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

CC1000
SWRS048A Page 40 of 55
MAIN Register (00h)
REGISTER NAME Default
value
Active Description
MAIN[7] RXTX - - RX/TX switch, 0 : RX , 1 : TX
MAIN[6] F_REG - - Selection of Frequency Register, 0 : Register A, 1 :
Register B
MAIN[5] RX_PD - H Power Down of LNA, Mixer, IF, Demodulator, RX part of
Signal Interface
MAIN[4] TX_PD - H Power Down of TX part of Signal Interface, PA
MAIN[3] FS_PD - H Power Down of Frequency Synthesiser
MAIN[2] CORE_PD - H Power Down of Crystal Oscillator Core
MAIN[1] BIAS_PD - H Power Down of BIAS (Global_Current_Generator)
and Crystal Oscillator Buffer
MAIN[0] RESET_N - L Reset, active low. Writing RESET_N low will write default
values to all other registers than MAIN. Bits in MAIN do
not have a default value, and will be written directly
through the configurations interface. Must be set high to
complete reset.
FREQ_2A Register (01h)
REGISTER NAME Default
value
Active Description
FREQ_2A[7:0] FREQ_A[23:16] 01110101 - 8 MSB of frequency control word A
FREQ_1A Register (02h)
REGISTER NAME Default
value
Active Description
FREQ_1A[7:0] FREQ_A[15:8] 10100000 - Bit 15 to 8 of frequency control word A
FREQ_0A Register (03h)
REGISTER NAME Default
value
Active Description
FREQ_0A[7:0] FREQ_A[7:0] 11001011 - 8 LSB of frequency control word A
FREQ_2B Register (04h)
REGISTER NAME Default
value
Active Description
FREQ_2B[7:0] FREQ_B[23:16] 01110101 - 8 MSB of frequency control word B
FREQ_1B Register (05h)
REGISTER NAME Default
value
Active Description
FREQ_1B[7:0] FREQ_B[15:8] 10100101 - Bit 15 to 8 of frequency control word B
FREQ_0B Register (06h)
REGISTER NAME Default
value
Active Description
FREQ_0B[7:0] FREQ_B[7:0] 01001110 - 8 LSB of frequency control word B
FSEP1 Register (07h)
REGISTER NAME Default
value
Active Description
FSEP1[7:3] - - - Not used
FSEP1[2:0] FSEP_MSB[2:0] 000 - 3 MSB of frequency separation control
FSEP0 Register (08h)
REGISTER NAME Default
value
Active Description
FSEP0[7:0] FSEP_LSB[7:0] 01011001 - 8 LSB of frequency separation control
CC1000
SWRS048A Page 41 of 55
CURRENT Register (09h)
REGISTER NAME Default
value
Active Description
CURRENT[7:4] VCO_CURRENT[3:0] 1100 - Control of current in VCO core for TX and RX
0000 : 150µA
0001 : 250µA
0010 : 350µA
0011 : 450µA
0100 : 950µA, use for RX, f= 400 – 500 MHz
0101 : 1050µA
0110 : 1150µA
0111 : 1250µA
1000 : 1450µA, use for RX, f<400 MHz and f>500
MHz; and TX, f= 400 – 500 MHz
1001 : 1550µA, use for TX, f<400 MHz
1010 : 1650µA
1011 : 1750µA
1100 : 2250µA
1101 : 2350µA
1110 : 2450µA
1111 : 2550µA, use for TX, f>500 MHz
CURRENT[3:2] LO_DRIVE[1:0] 10 Control of current in VCO buffer for LO drive
00 : 0.5mA, use for TX
01 : 1.0mA , use for RX, f<500 MHz*
10 : 1.5mA,
11 : 2.0mA, use for RX, f>500 MHz *
* LO_DRIVE can be reduced to save current in
RX mode. See
Table 10
for details
CURRENT[1:0] PA_DRIVE[1:0] 10 Control of current in VCO buffer for PA
00 : 1mA, use for RX
01 : 2mA, use for TX, f<500 MHz
10 : 3mA
11 : 4mA, use for TX, f>500 MHz
FRONT_END Register (0Ah)
REGISTER NAME Default
value
Active Description
FRONT_END[7:6] - 00 - Not used
FRONT_END[5] BUF_CURRENT 0 - Control of current in the LNA_FOLLOWER
0 : 520uA, use for f<500 MHz
1 : 690uA, use for f>500 MHz *
*BUF_CURRENT can be reduced to save
current in RX mode. See
Table 10
for details.
FRONT_END[4:3] LNA_CURRENT
[1:0]
01 - Control of current in LNA
00 : 0.8mA, use for f<500 MHz *
01 : 1.4mA
10 : 1.8mA, use for f>500 MHz *
11 : 2.2mA
*LNA_CURRENT can be reduced to save
current in RX mode. See
Table 10
for details.
FRONT_END[2:1] IF_RSSI[1:0] 00 - Control of IF_RSSI pin
00 : Internal IF and demodulator, RSSI inactive
01 : RSSI active, RSSI/IF is analog RSSI output
10 : External IF and demodulator, RSSI/IF is
mixer output. Internal IF in power down mode.
11 : Not used
FRONT_END[0] XOSC_BYPASS 0 - 0 : Internal XOSC enabled
1 : Power-Down of XOSC, external CLK used
CC1000
SWRS048A Page 42 of 55
PA_POW Register (0Bh)
REGISTER NAME Default
value
Active Description
PA_POW[7:4] PA_HIGHPOWER[3:0] 0000 - Control of output power in high power array.
Should be 0000 in PD mode . See Table 11
page 32 for details.
PA_POW[3:0] PA_LOWPOWER[3:0] 1111 - Control of output power in low power array
Should be 0000 in PD mode. See Table 11
page 32 for details.
PLL Register (0Ch)
REGISTER NAME Default
value
Active Description
PLL[7] EXT_FILTER 0 - 1 : External loop filter
0 : Internal loop filter
1-to-0 transition samples F_COMP
comparator when BREAK_LOOP=1
(TEST3)
PLL[6:3] REFDIV[3:0] 0010 - Reference divider
0000 : Not allowed
0001 : Not allowed
0010 : Divide by 2
0011 : Divide by 3
…........
1111 : Divide by 15
PLL[2] ALARM_DISABLE 0 h 0 : Alarm function enabled
1 : Alarm function disabled
PLL[1] ALARM_H - - Status bit for tuning voltage out of range
(too close to VDD)
PLL[0] ALARM_L - - Status bit for tuning voltage out of range
(too close to GND)
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