19
Metallization Mask Layout
FIGURE 35. EQUIVALENT INPUT NOISE VOLTAGE vs
FREQUENCY
FIGURE 36. POWER SUPPLY REJECTION RATIO vs FREQUENCY
Typical Performance Curves (Continued)
SUPPLY VOLTAGE: V
S
= ±15V
T
A
= 25
o
C
FREQUENCY (Hz)
110
1
10
2
10
3
10
4
10
5
EQUIVALENT INPUT NOISE VOLTAGE (nV/√Hz)
100
10
1
1000
10
2
10
3
10
4
10
5
10
6
10
7
FREQUENCY (Hz)
POWER SUPPLY REJECTION RATIO (dB)
100
80
60
40
20
0
+PSRR
-PSRR
SUPPLY VOLTAGE: V
S
= ±15V
T
A
= 25
o
C
POWER SUPPLY REJECTION RATIO
(PSRR) = ∆V
IO
/∆V
S
10
1
Dimensions in parenthesis are in millimeters and are derived
from the basic inch dimensions as indicated. Grid graduations
are in mils (10
-3
inch).
The photographs and dimensions represent a chip when it is
part of the wafer. When the wafer is cut into chips, the cleavage
angles are 57
o
instead of 90
ο
with respect to the face of the
chip. Therefore, the isolated chip is actually 7 mils (0.17mm)
larger in both dimensions.
62-70
(1.575-1.778)
4-10
(0.102-0.254)
60
50
40
30
20
10
0
58-66
(1.473-1.676)
5040302010
61
0 60
65
CA3140, CA3140A
