C8051F040/1/2/3/4/5/6/7
278 Rev. 1.5
22.1. Enhanced Baud Rate Generation
The UART1 baud rate is generated by Timer 1 in 8-bit auto-reload mode. The TX clock is generated by
TL1; the RX clock is generated by a copy of TL1 (shown as RX Timer in Figure 22.2), which is not user-
accessible. Both TX and RX Timer overflows are divided by two to generate the TX and RX baud rates.
The RX Timer runs when Timer 1 is enabled, and uses the same reload value (TH1). However, an
RX Timer reload is forced when a START condition is detected on the RX pin. This allows a receive to
begin any time a START is detected, independent of the TX Timer state.
Figure 22.2. UART1 Baud Rate Logic
Timer 1 should be configured for Mode 2, 8-bit auto-reload (see Section “23.1.3. Mode 2: 8-bit Counter/
Timer with Auto-Reload” on page 289). The Timer 1 reload value should be set so that overflows will
occur at two times the desired baud rate. Note that Timer 1 may be clocked by one of five sources: SYS-
CLK, SYSCLK / 4, SYSCLK / 12, SYSCLK / 48, or the external oscillator clock / 8. For any given Timer 1
clock source, the UART1 baud rate is determined by Equation 22.1, where T1
CLK
is the frequency of the
clock supplied to Timer 1, and TH1 is the high byte of Timer 1 (reload value).
Equation 22.1. UART1 Baud Rate
Timer 1 clock frequency is selected as described in Section “23.1. Timer 0 and Timer 1” on page 287. A
quick reference for typical baud rates and system clock frequencies is given in Table 22.1 through
Table 22.6. Note that the internal oscillator may still generate the system clock when the external oscillator
is driving Timer 1 (see Section “23.1. Timer 0 and Timer 1” on page 287 for more details).
RX Timer
Start
Detected
Overflow
Overflow
TH1
TL1
TX Clock
2
RX Clock
2
Timer 1 UART1
UartBaudRate
T1
CLK
256 TH1–
-------------------------------
1
2
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=
