C8051F040/1/2/3/4/5/6/7
28 Rev. 1.5
1.3. JTAG Debug and Boundary Scan
The C8051F04x family has on-chip JTAG boundary scan and debug circuitry that provides non-intrusive,
full speed, in-circuit debugging using the production part installed in the end application, via the four-pin
JTAG interface. The JTAG port is fully compliant to IEEE 1149.1, providing full boundary scan for test and
manufacturing purposes.
Silicon Labs' debugging system supports inspection and modification of memory and registers, break-
points, watchpoints, a stack monitor, and single stepping. No additional target RAM, program memory, tim-
ers, or communications channels are required. All the digital and analog peripherals are functional and
work correctly while debugging. All the peripherals (except for the ADC and SMBus) are stalled when the
MCU is halted, during single stepping, or at a breakpoint in order to keep them synchronized with instruc-
tion execution.
The C8051F040DK development kit provides all the hardware and software necessary to develop applica-
tion code and perform in-circuit debugging with the C8051F04x MCUs. The development kit includes two
target boards and a cable to facilitate evaluating a simple CAN communication network. The kit also
includes software with a developer's studio and debugger, a target application board with the associated
MCU installed, and the required cables and wall-mount power supply. The Serial Adapter takes its power
from the application board; it requires roughly 20 mA at 2.7-3.6 V. For applications where there is not suffi-
cient power available from the target system, the provided power supply can be connected directly to the
Serial Adapter.
Silicon Labs’ debug environment is a vastly superior configuration for developing and debugging embed-
ded applications compared to standard MCU emulators, which use on-board "ICE Chips" and target cables
and require the MCU in the application board to be socketed. Silicon Labs' debug environment both
increases ease of use and preserves the performance of the precision, on-chip analog peripherals.
Figure 1.8. Development/In-System Debug Diagram
TARGET PCB
Serial
Adapter
C8051
F040
VDD GND
JTAG (x4), VDD, GND
WINDOWS 95 or later
Integrated Development
Environment
