C8051F040/1/2/3/4/5/6/7

Rev. 1.5 229

18.1.1. CAN Controller Timing

The CAN controller’s system clock (f

sys

) is derived from the CIP-51 system clock (SYSCLK). Note that an

external oscillator (such as a quartz crystal) is typically required due to the high accuracy requirements for

CAN communication. Refer to Section “4.10.4 Oscillator Tolerance Range” in the Bosch CAN User’s Guide

for further information regarding this topic.

18.1.2. Example Timing Calculation for 1 Mbit/Sec Communication

This example shows how to configure the CAN contoller timing parameters for a 1 Mbit/Sec bit rate.

Table 18.1 shows timing-related system parameters needed for the calculation.

Each bit transmitted on a CAN network has 4 segments (Sync_Seg, Prop_Seg, Phase_Seg1, and

Phase_Seg2), as shown in Figure 18.3. The sum of these segments determines the CAN bit time (1/bit

rate). In this example, the desired bit rate is 1 Mbit/sec; therefore, the desired bit time is 1000 ns.

Figure 18.3. Four Segments of a CAN Bit Time

Table 18.1. Background System Information

Parameter Value Description

CIP-51 system clock (SYSCLK) 22.1184 MHz

External oscillator in ‘Crystal Oscillator Mode’. A

22.1184 MHz quartz crystal is connected between

XTAL1 and XTAL2.

CAN Controller system clock

sys

)

22.1184 MHz Derived from SYSCLK.

CAN clock period (t

sys

)

45.211 ns

Derived from 1/f

sys

CAN time quantum (t

)

45.211 ns

Derived from t

sys

x BRP

1,2

CAN bus length 10 m 5 ns/m signal delay between CAN nodes.

Propagation delay time

400 ns 2 x (transceiver loop delay + bus line delay)

Notes:

1. T

he CAN time quantum (t

) is the smallest unit of time recognized by the CAN contoller. Bit timing parameters

are often specified in integer multiples of the time quantum.

2. The Baud Rate Prescaler (BRP) is defined as the value of the BRP Extension Register plus 1. The BRP

Extension Register has a reset value of 0x0000; the Baud Rate Prescaler has a reset value of 1.

3. Base

d on an ISO-11898 compliant transceiver. CAN does not specify a physical layer.

Prop_Seg Phase_Seg1 Phase_Seg2

CAN Bit Time (4 to 25 t

)

Sync_Seg

1 to 8 t

Sample Point

C8051F040/1/2/3/4/5/6/7

230 Rev. 1.5

We will adjust the length of the 4 bit segments so that their sum is as close as possible to the desired bit

time. Since each segment must be an integer multiple of the time quantum (t

), the closest achievable bit

time is 22 t

(994.642 ns), yielding a bit rate of 1.00539 Mbit/sec. The Sync_Seg is a constant 1 t

. The

Prop_Seg must be greater than or equal to the propagation delay of 400 ns; we choose 9 t

(406.899 ns).

The remaining time quanta (t

) in the bit time are divided between Phase_Seg1 and Phase_Seg2 as

shown in Figure 18.1. We select Phase_Seg1 = 6 t

and Phase_Seg2 = 6 t

Equation 18.1. Assigning the Phase Segments

The Synchronization Jump Width (SJW) timing parameter is defined by Figure 18.2. It is used for determin-

ing the value written to the Bit Timing Register and for determining the required oscillator tolerance. Since

we are using a quartz crystal as the system clock source, an oscillator tolerance calculation is not needed.

Equation 18.2. Synchronization Jump Width (SJW)

The value written to the Bit Timing Register can be calculated using Equation 18.3. The BRP Extension

Equation 18.3. Calculating the Bit Timing Register Value

The following steps are performed to initialize the CAN timing registers:

Step 1. Set the SFRPAGE register to CAN0_PAGE.

Step 2. Set the INIT the CCE bits to ‘1’ in the CAN Control Register accessible through the

CAN0CN SFR.

Step 3. Set the CAN0ADR to 0x03 to point to the Bit Timing Register.

Phase_Seg1 Phase_Seg2+ Bit Time Sync_Seg Prop_Seg+–=

Note 1: If Phase_Seg1 + Phase_Seg2 is even, then Phase_Seg2 = Phase_Seg1.

Note 2: Phase_Seg2 should be at least 2 t

SJW = min ( 4, Phase_Seg1 )

BRPE = BRP - 1 = BRP Extension Register = 0x0000

SJWp = SJW - 1 = min ( 4, 6 ) – 1 = 3

TSEG1 = (Prop_Seg + Phase_Seg1 - 1) = 9 + 6 - 1 = 14

TSEG2 = (Phase_Seg2 - 1) = 5

Bit Timing Register = (TSEG2 * 0x1000) + (TSEG1 * 0x0100) + (SJWp * 0x0040) + BRPE = 0x5EC0

C8051F040/1/2/3/4/5/6/7

Rev. 1.5 231

Step 4. Write the value 0x5EC0 to the [CAN0DATH:CAN0DATL] CIP-51 SFRs to set the Bit

Timing Register using the indirect indexing method described on Section 18.2.5 on page

232.

Step 5. Perform other CAN initializations.

18.2. CAN Registers

CAN registers are classified as follows:

1. CAN Controller Protocol Registers: CAN control, interrupt, error control, bus status, test

modes.

2. Message Object Interface Registers

: Used to configure 32 Message Objects, send and

receive data to and from Message Objects. The CIP-51 MCU accesses the CAN mes-

sage RAM via the Message Object Interface Registers. Upon writing a message object

number to an IF1 or IF2 Command Request Register, the contents of the associated

Interface Registers (IF1 or IF2) will be transferred to or from the message object in CAN

RAM.

3. Message Handler Registers

: These read only registers are used to provide information to

the CIP-51 MCU about the message objects (MSGVLD flags, Transmission Request

Pending, New Data Flags) and Interrupts Pending (which Message Objects have caused

an interrupt or status interrupt condition).

4. CIP-51 MCU Special Function Registers (SFR)

: Six registers located in the CIP-51 MCU

memory map that allow direct access to certain CAN Controller Protocol Registers, and

Indexed indirect access to all CAN registers.

18.2.1. CAN Controller Protocol Registers

The CAN Control Protocol Registers are used to configure the CAN controller, process interrupts, monitor

bus status, and place the controller in test modes. The CAN controller protocol registers are accessible

using CIP-51 MCU SFR’s by an indexed method, and some can be accessed directly by addressing the

SFR’s in the CIP-51 SFR map for convenience.

The registers are: CAN Control Register (CAN0CN), CAN Status Register (CAN0STA), CAN Test Register

(CAN0TST), Error Counter Register, Bit Timing Register, and the Baud Rate Prescaler (BRP) Extension

accessed indirectly using the CAN address indexed method via CAN0ADR, CAN0DATH, and CAN0DATL.

Please refer to the Bosch CAN User’s Guide for information on the function and use of the CAN Control

Protocol Registers.

18.2.2. Message Object Interface Registers

There are two sets of Message Object Interface Registers used to configure the 32 Message Objects that

transmit and receive data to and from the CAN bus. Message objects can be configured for transmit or

receive, and are assigned arbitration message identifiers for acceptance filtering by all CAN nodes.

Message Objects are stored in Message RAM, and are accessed and configured using the Message

Object Interface Registers. These registers are accessed via the CIP-51’s CAN0ADR and CAN0DAT reg-

isters using the indirect indexed address method.

Please refer to the Bosch CAN User’s Guide for information on the function and use of the Message Object

Interface Registers.

Part #	C8051F041-GQ
Description	MCU 8BIT CISC 64KB FLASH 3V 64TQFP - Trays
Category	IC
Availability	In Stock
Qty	2

C8051F041-GQ

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