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ATMEGA48-20AU

Part # ATMEGA48-20AU
Description MCU 8BIT ATMEGA RISC 4KB FLASH 3.3V/5V 32TQFP - Trays
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

280
2545M–AVR–09/07
ATmega48/88/168
26.8.11 Programming Time for Flash when Using SPM
The calibrated RC Oscillator is used to time Flash accesses. Table 26-5 shows the typical pro-
gramming time for Flash accesses from the CPU.
Note: 1. Minimum and maximum programming time is per individual operation.
26.8.12 Simple Assembly Code Example for a Boot Loader
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
;-the routine must be placed inside the Boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during Self-Programming (Page Erase and Page Write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the Boot
; loader section or that the interrupts are disabled.
.equ PAGESIZEB = PAGESIZE*2 ;PAGESIZEB is page size in BYTES, not words
.org SMALLBOOTSTART
Write_page:
; Page Erase
ldi spmcrval, (1<<PGERS) | (1<<SELFPRGEN)
call Do_spm
; re-enable the RWW section
ldi spmcrval, (1<<RWWSRE) | (1<<SELFPRGEN)
call Do_spm
; transfer data from RAM to Flash page buffer
ldi looplo, low(PAGESIZEB) ;init loop variable
ldi loophi, high(PAGESIZEB) ;not required for PAGESIZEB<=256
Wrloop:
ld r0, Y+
ld r1, Y+
ldi spmcrval, (1<<SELFPRGEN)
call Do_spm
adiw ZH:ZL, 2
sbiw loophi:looplo, 2 ;use subi for PAGESIZEB<=256
brne Wrloop
; execute Page Write
subi ZL, low(PAGESIZEB) ;restore pointer
sbci ZH, high(PAGESIZEB) ;not required for PAGESIZEB<=256
ldi spmcrval, (1<<PGWRT) | (1<<SELFPRGEN)
call Do_spm
; re-enable the RWW section
Table 26-5. SPM Programming Time
(1)
Symbol Min Programming Time Max Programming Time
Flash write (Page Erase, Page Write, and
write Lock bits by SPM)
3.7 ms 4.5 ms
281
2545M–AVR–09/07
ATmega48/88/168
ldi spmcrval, (1<<RWWSRE) | (1<<SELFPRGEN)
call Do_spm
; read back and check, optional
ldi looplo, low(PAGESIZEB) ;init loop variable
ldi loophi, high(PAGESIZEB) ;not required for PAGESIZEB<=256
subi YL, low(PAGESIZEB) ;restore pointer
sbci YH, high(PAGESIZEB)
Rdloop:
lpm r0, Z+
ld r1, Y+
cpse r0, r1
jmp Error
sbiw loophi:looplo, 1 ;use subi for PAGESIZEB<=256
brne Rdloop
; return to RWW section
; verify that RWW section is safe to read
Return:
in temp1, SPMCSR
sbrs temp1, RWWSB ; If RWWSB is set, the RWW section is not ready yet
ret
; re-enable the RWW section
ldi spmcrval, (1<<RWWSRE) | (1<<SELFPRGEN)
call Do_spm
rjmp Return
Do_spm:
; check for previous SPM complete
Wait_spm:
in temp1, SPMCSR
sbrc temp1, SELFPRGEN
rjmp Wait_spm
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in temp2, SREG
cli
; check that no EEPROM write access is present
Wait_ee:
sbic EECR, EEPE
rjmp Wait_ee
; SPM timed sequence
out SPMCSR, spmcrval
spm
; restore SREG (to enable interrupts if originally enabled)
out SREG, temp2
ret
282
2545M–AVR–09/07
ATmega48/88/168
26.8.13 ATmega88 Boot Loader Parameters
In Table 26-6 through Table 26-8, the parameters used in the description of the self program-
ming are given.
Note: The different BOOTSZ Fuse configurations are shown in Figure 26-2.
For details about these two section, see “NRWW – No Read-While-Write Section” on page 271
and “RWW – Read-While-Write Section” on page 271
Note: 1. Z15:Z13: always ignored
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
Table 26-6. Boot Size Configuration, ATmega88
BOOTSZ1 BOOTSZ0
Boot
Size Pages
Application
Flash
Section
Boot
Loader
Flash
Section
End
Application
Section
Boot Reset
Address
(Start Boot
Loader
Section)
11
128
words
4
0x000 -
0xF7F
0xF80 -
0xFFF
0xF7F 0xF80
10
256
words
8
0x000 -
0xEFF
0xF00 -
0xFFF
0xEFF 0xF00
01
512
words
16
0x000 -
0xDFF
0xE00 -
0xFFF
0xDFF 0xE00
00
1024
words
32
0x000 -
0xBFF
0xC00 -
0xFFF
0xBFF 0xC00
Table 26-7. Read-While-Write Limit, ATmega88
Section Pages Address
Read-While-Write section (RWW) 96 0x000 - 0xBFF
No Read-While-Write section (NRWW) 32 0xC00 - 0xFFF
Table 26-8. Explanation of Different Variables used in Figure 26-3 and the Mapping to the Z-
pointer, ATmega88
Variable
Corresponding
Z-value
(1)
Description
PCMSB 11
Most significant bit in the Program Counter. (The
Program Counter is 12 bits PC[11:0])
PAG EM SB 4
Most significant bit which is used to address the
words within one page (32 words in a page requires
5 bits PC [4:0]).
ZPCMSB Z12
Bit in Z-register that is mapped to PCMSB. Because
Z0 is not used, the ZPCMSB equals PCMSB + 1.
ZPAGEMSB Z5
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB equals
PAGEMSB + 1.
PCPAGE PC[11:5] Z12:Z6
Program counter page address: Page select, for
page erase and page write
PCWORD PC[4:0] Z5:Z1
Program counter word address: Word select, for
filling temporary buffer (must be zero during page
write operation)
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