361
2545M–AVR–09/07
ATmega48/88/168
Problem Fix/Workaround
The first case can be avoided during run-mode by ensuring that only one reset source is
active. If an external reset push button is used, the reset start-up time should be selected
such that the reset line is fully debounced during the start-up time.
The second case can be avoided by not using the system clock prescaler.
The third case occurs during In-System programming only. It is most frequently seen when
using the internal RC at maximum frequency.
If the device gets stuck in the reset-state, turn power off, then on again to get the device out
of this state.
3. Interrupts may be lost when writing the timer registers in the asynchronous timer
If one of the timer registers which is synchronized to the asynchronous timer2 clock is writ-
ten in the cycle before an overflow interrupt occurs, the interrupt may be lost.
Problem Fix/Workaround
Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF
before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.
The only safe time to write to any of the Timer2 registers in asynchronous mode is in a com-
pare interrupt routine where the compare register is not 0xFF, or if the compare register is
0xFF, after a delay of at least one asynchronous clock cycle from the start of the interrupt.
34.3 Errata ATmega168
The revision letter in this section refers to the revision of the ATmega168 device.
34.3.1 Rev C
•
Interrupts may be lost when writing the timer registers in the asynchronous timer
1. Interrupts may be lost when writing the timer registers in the asynchronous timer
If one of the timer registers which is synchronized to the asynchronous timer2 clock is writ-
ten in the cycle before an overflow interrupt occurs, the interrupt may be lost.
Problem Fix/Workaround
Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF
before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.
The only safe time to write to any of the Timer2 registers in asynchronous mode is in a com-
pare interrupt routine where the compare register is not 0xFF, or if the compare register is
0xFF, after a delay of at least one asynchronous clock cycle from the start of the interrupt.
34.3.2 Rev B
•
Part may hang in reset
• Interrupts may be lost when writing the timer registers in the asynchronous timer
1. Part may hang in reset
Some parts may get stuck in a reset state when a reset signal is applied when the internal
reset state-machine is in a specific state. The internal reset state-machine is in this state for
approximately 10 ns immediately before the part wakes up after a reset, and in a 10 ns win-
dow when altering the system clock prescaler. The problem is most often seen during In-
