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ATMEGA48-20AU

Part # ATMEGA48-20AU
Description MCU 8BIT ATMEGA RISC 4KB FLASH 3.3V/5V 32TQFP - Trays
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

355
2545M–AVR–09/07
ATmega48/88/168
33.3 32M1-A
2325 Orchard Parkway
San Jose, CA 95131
TITLE
DRAWING NO.
R
REV.
32M1-A, 32-pad, 5 x 5 x 1.0 mm Body, Lead Pitch 0.50 mm,
E
32M1-A
5/25/06
3.10 mm Exposed Pad, Micro Lead Frame Package (MLF)
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
D1
D
E1
E
e
b
A3
A2
A1
A
D2
E2
0.08
C
L
1
2
3
P
P
0
1
2
3
A 0.80 0.90 1.00
A1 0.02 0.05
A2 0.65 1.00
A3 0.20 REF
b 0.18 0.23 0.30
D
D1
D2 2.95 3.10 3.25
4.90 5.00 5.10
4.70 4.75 4.80
4.70 4.75 4.80
4.90 5.00 5.10
E
E1
E2 2.95 3.10 3.25
e 0.50 BSC
L 0.30 0.40 0.50
P 0.60
12
o
Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2.
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0
Pin 1 ID
Pin #1 Notch
(0.20 R)
K 0.20
K
K
356
2545M–AVR–09/07
ATmega48/88/168
33.4 28P3
2325 Orchard Parkway
San Jose, CA 95131
TITLE
DRAWING NO.
R
REV.
28P3, 28-lead (0.300"/7.62 mm Wide) Plastic Dual
Inline Package (PDIP)
B
28P3
09/28/01
PIN
1
E1
A1
B
REF
E
B1
C
L
SEATING PLANE
A
0º ~ 15º
D
e
eB
B2
(4 PLACES)
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
A 4.5724
A1 0.508
D 34.544 – 34.798 Note 1
E 7.620 8.255
E1 7.112 7.493 Note 1
B 0.381 0.533
B1 1.143 1.397
B2 0.762 1.143
L 3.175 3.429
C 0.203 0.356
eB 10.160
e 2.540 TYP
Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion.
Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").
357
2545M–AVR–09/07
ATmega48/88/168
34. Errata
34.1 Errata ATmega48
The revision letter in this section refers to the revision of the ATmega48 device.
34.1.1 Rev. D
Interrupts may be lost when writing the timer registers in the asynchronous timer
1. Interrupts may be lost when writing the timer registers in the asynchronous timer
If one of the timer registers which is synchronized to the asynchronous timer2 clock is writ-
ten in the cycle before an overflow interrupt occurs, the interrupt may be lost.
Problem Fix/Workaround
Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF
before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.
The only safe time to write to any of the Timer2 registers in asynchronous mode is in a com-
pare interrupt routine where the compare register is not 0xFF, or if the compare register is
0xFF, after a delay of at least one asynchronous clock cycle from the start of the interrupt.
34.1.2 Rev. C
Reading EEPROM when system clock frequency is below 900 kHz may not work
Interrupts may be lost when writing the timer registers in the asynchronous timer
1. Reading EEPROM when system clock frequency is below 900 kHz may not work
Reading Data from the EEPROM at system clock frequency below 900 kHz may result in
wrong data read.
Problem Fix/Workaround
Avoid using the EEPROM at clock frequency below 900 kHz.
2. Interrupts may be lost when writing the timer registers in the asynchronous timer
If one of the timer registers which is synchronized to the asynchronous timer2 clock is writ-
ten in the cycle before an overflow interrupt occurs, the interrupt may be lost.
Problem Fix/Workaround
Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF
before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.
The only safe time to write to any of the Timer2 registers in asynchronous mode is in a com-
pare interrupt routine where the compare register is not 0xFF, or if the compare register is
0xFF, after a delay of at least one asynchronous clock cycle from the start of the interrupt.
34.1.3 Rev. B
Interrupts may be lost when writing the timer registers in the asynchronous timer
1. Interrupts may be lost when writing the timer registers in the asynchronous timer
If one of the timer registers which is synchronized to the asynchronous timer2 clock is writ-
ten in the cycle before an overflow interrupt occurs, the interrupt may be lost.
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