Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

AT45DB081D-SU-2.5

Part # AT45DB081D-SU-2.5
Description DATAFLASH, 8M, SERIAL, 2.5V -IND TEMP, GREEN 8 LEAD SOIC
Category IC
Availability Out of Stock
Qty 0
Qty Price
1 + $0.65000



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

34
3596E–DFLASH–02/07
AT45DB081D
Table 18-4. AC Characteristics – RapidS/Serial Interface
Symbol Parameter
AT45DB081D
(2.5V Version) AT45DB081D
Min Typ Max Min Typ Max Units
f
SCK
SCK Frequency 50 66 MHz
f
CAR1
SCK Frequency for Continuous Array Read 50 66 MHz
f
CAR2
SCK Frequency for Continuous Array Read
(Low Frequency)
33 33 MHz
t
WH
SCK High Time 6.8 6.8 ns
t
WL
SCK Low Time 6.8 6.8 ns
t
SCKR
(1)
SCK Rise Time, Peak-to-Peak (Slew Rate) 0.1 0.1 V/ns
t
SCKF
(1)
SCK Fall Time, Peak-to-Peak (Slew Rate) 0.1 0.1 V/ns
t
CS
Minimum CS High Time 50 50 ns
t
CSS
CS Setup Time 5 5 ns
t
CSH
CS Hold Time 5 5 ns
t
SU
Data In Setup Time 2 2 ns
t
H
Data In Hold Time 3 3 ns
t
HO
Output Hold Time 0 0 ns
t
DIS
Output Disable Time 8 6 ns
t
V
Output Valid 8 6 ns
t
WPE
WP Low to Protection Enabled 1 1 µs
t
WPD
WP High to Protection Disabled 1 1 µs
t
EDPD
CS High to Deep Power-down Mode 3 3 µs
t
RDPD
CS High to Standby Mode 30 30 µs
t
XFR
Page to Buffer Transfer Time 200 200 µs
t
comp
Page to Buffer Compare Time 200 200 µs
t
EP
Page Erase and Programming Time
(256/264 bytes)
14 35 14 35 ms
t
P
Page Programming Time (256/264 bytes) 2 4 2 4 ms
t
PE
Page Erase Time (256/264 bytes) 13 32 13 32 ms
t
BE
Block Erase Time (2,048/2,112 bytes) 30 75 30 75 ms
t
SE
Sector Erase Time (65,536/67,584) 1.6 5 1.6 5 s
t
CE
Chip Erase Time TBD TBD TBD TBD s
t
RST
RESET Pulse Width 10 10 µs
t
REC
RESET Recovery Time 1 1 µs
35
3596E–DFLASH–02/07
AT45DB081D
19. Input Test Waveforms and Measurement Levels
t
R
, t
F
< 2 ns (10% to 90%)
20. Output Test Load
21. AC Waveforms
Six different timing waveforms are shown on page 36. Waveform 1 shows the SCK signal being
low when CS
makes a high-to-low transition, and waveform 2 shows the SCK signal being high
when CS
makes a high-to-low transition. In both cases, output SO becomes valid while the
SCK signal is still low (SCK low time is specified as t
WL
). Timing waveforms 1 and 2 conform to
RapidS serial interface but for frequencies up to 66 MHz. Waveforms 1 and 2 are compatible
with SPI Mode 0 and SPI Mode 3, respectively.
Waveform 3 and waveform 4 illustrate general timing diagram for RapidS serial interface. These
are similar to waveform 1 and waveform 2, except that output SO is not restricted to become
valid during the t
WL
period. These timing waveforms are valid over the full frequency range (max-
imum frequency = 66 MHz) of the RapidS serial case.
AC
DRIVING
LEVELS
AC
MEASUREMENT
LEVEL
0.45V
1.5V
2.4V
DEVICE
UNDER
TEST
30 pF
36
3596E–DFLASH–02/07
AT45DB081D
21.1 Waveform 1 – SPI Mode 0 Compatible (for Frequencies up to 66 MHz)
21.2 Waveform 2 – SPI Mode 3 Compatible (for Frequencies up to 66 MHz)
21.3 Waveform 3 – RapidS Mode 0 (F
MAX
= 66 MHz)
21.4 Waveform 4 – RapidS Mode 3 (F
MAX
= 66 MHz)
CS
SCK
SI
SO
t
CSS
VALID IN
t
H
t
SU
t
WH
t
WL
t
CSH
t
CS
t
V
HIGH IMPEDANCE
VALID OUT
t
HO
t
DIS
HIGH IMPEDANCE
CS
SCK
SO
t
CSS
VALID IN
t
H
t
SU
t
WL
t
WH
t
CSH
t
CS
t
V
HIGH Z
VALID OUT
t
HO
t
DIS
HIGH IMPEDANCE
SI
CS
SCK
SI
SO
t
CSS
VALID IN
t
H
t
SU
t
WH
t
WL
t
CSH
t
CS
t
V
HIGH IMPEDANCE
VALID OUT
t
HO
t
DIS
HIGH IMPEDANCE
CS
SCK
SO
t
CSS
VALID IN
t
H
t
SU
t
WL
t
WH
t
CSH
t
CS
t
V
HIGH Z
VALID OUT
t
HO
t
DIS
HIGH IMPEDANCE
SI
PREVIOUS56789101112131415161718NEXT