AT27C080
2
The AT27C080 is available in a choice of packages, includ-
ing; one-time programmable (OTP) plastic PLCC, PDIP,
SOIC (SOP), and TSOP, as well as windowed ceramic
Cerdip. All devices feature two-line control (CE
, OE) to give
designers the flexibility to prevent bus contention.
With high density 1M byte storage capability, the
AT27C080 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass storage
media.
Atmel’s 27C080 has additional features to ensure high
quality and efficient production use. The Rapid
™
Program-
ming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming
time is typically only 50
s/byte. The Integrated Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming equipment to select the proper programming
algorithms and voltages.
Erasure Characteristics
The entire memory array of the AT27C080 is erased (all
outputs read as V
OH
) after exposure to ultraviolet light at a
wavelength of 2,537Å. Complete erasure is assured after a
minimum of 20 minutes of exposure using 12,000
W/cm
2
intensity lamps spaced one inch away from the chip. Mini-
mum erase time for lamps at other intensity ratings can be
calculated from the minimum integrated erasure dose of 15
W
.
sec/cm
2
. To prevent unintentional erasure, an opaque
label is recommended to cover the clear window on any UV
erasable EPROM that will be subjected to continuous
flourescent indoor lighting or sunlight.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1
F high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
F bulk electrolytic capacitor should
be utilized, again connected between the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
