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AT24C256-10PC

Part # AT24C256-10PC
Description IC EEPROM 256KBIT 1MHZ 8DIP
Category IC
Availability In Stock
Qty 11
Qty Price
1 + $1.09583
Manufacturer Available Qty
Atmel
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1
Features
Low Voltage and Standard Voltage Operation
5.0 (V
CC
= 4.5V to 5.5V)
2.7 (V
CC
= 2.7V to 5.5V)
1.8 (V
CC
= 1.8V to 3.6V)
Internally Organized 16,384 x 8 and 32,768 x 8
2-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
64-Byte Page Write Mode (Partial Page Writes Allowed)
Self-Timed Write Cycle (5 ms typical)
High Reliability
Endurance: 100,000 Write Cycles
Data Retention: 40 Years
ESD Protection: > 4000V
Automotive Grade and Extended Temperature Devices Available
8-Pin JEDEC PDIP, 8-Pin JEDEC and EIAJ SOIC, 14-Pin TSSOP, and
8-Pin Leadless Array Packages
Description
The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8
bits each. The device’s cascadable feature allows up to 4 devices to share a common
2-wire bus. The device is optimized for use in many industrial and commercial applica-
tions where low power and low voltage operation are essential. The devices are avail-
able in space-saving 8-pin JEDEC PDIP, 8-pin EIAJ, 8-pin JEDEC SOIC, 14-pin
TSSOP, and 8-pin LAP packages. In addition, the entire family is available in 5.0V
(4.5V to 5.5V), 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.
Rev. 0670C–08/98
2-Wire Serial
EEPROMs
128K (16,384 x 8)
256K (32,768 x 8)
AT24C128
AT24C256
Pin Configurations
Pin Name Function
A
0
to A
1
Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
NC No Connect
8-Pin PDIP
1
2
3
4
8
7
6
5
A0
A1
NC
GND
VCC
WP
SCL
SDA
8-Pin SOIC
1
2
3
4
8
7
6
5
A0
A1
NC
GND
VCC
WP
SCL
SDA
8-Pin Leadless Array
Bottom View
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
NC
GND
14-Pin TSSOP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
A0
A1
NC
NC
NC
NC
GND
VCC
WP
NC
NC
NC
SCL
SDA
AT24C128/256
2
Absolute Maximum Ratings*
Block Diagram
Pin Description
SERIAL CLOCK (SCL):
The SCL input is used to positive
edge clock data into each EEPROM device and negative
edge clock data out of each device.
SERIAL DATA (SDA):
The SDA pin is bidirectional for
serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open
collector devices.
DEVICE/PAGE ADDRESSES (A1, A0):
The A1 and A0
pins are device address inputs that are hardwired or left not
connected for hardware compatibility with AT24C32/64.
When the pins are hardwired, as many as four 128K/256K
devices may be addressed on a single bus system (device
addressing is discussed in detail under the Device
Addressing section). When the pins are not hardwired, the
default A
1
and A
0
are zero.
WRITE PROTECT (WP):
The write protect input, when tied
to GND, allows normal write operations. When WP is tied
high to V
CC
, all write operations to the memory are inhib-
ited. If left unconnected, WP is internally pulled down to
GND. Switching WP to V
CC
prior to a write operation cre-
ates a software write protect function.
Memory Organization
AT24C128/256, 128K/256K SERIAL EEPROM:
The
128K/256K is internally organized as 256/512 pages of 64-
bytes each. Random word addressing requires a 14/15-bit
data word address.
Operating Temperature.................................. -55
°
C to +125
°
C
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature..................................... -65
°
C to +150
°
C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current........................................................ 5.0 mA
AT24C128/256
3
Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25
°
C, f = 1.0 MHz, V
CC
= +1.8V.
Note: This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: T
AI
= -40
°
C to +85
°
C, V
CC
= +1.8V to +5.5V, T
AC
= 0
°
C to +70
°
C,
V
CC
= +1.8V to +5.5V (unless otherwise noted).
Note: V
IL
min and V
IH
max are reference only and are not tested
Symbol Test Condition Max Units Conditions
C
I/O
Input/Output Capacitance (SDA) 8 pF V
I/O
= 0V
C
IN
Input Capacitance (A
0
, A
1
, SCL) 6 pF V
IN
= 0V
Symbol Parameter Test Condition Min Typ Max Units
V
CC1
Supply Voltage 1.8 3.6 V
V
CC2
Supply Voltage 2.7 5.5 V
V
CC3
Supply Voltage 4.5 5.5 V
I
CC1
Supply Current V
CC
= 5.0V READ at 400 kHz 1.0 2.0 mA
I
CC2
Supply Current V
CC
= 5.0V WRITE at 400 kHz 2.0 3.0 mA
I
SB1
Standby Current
(1.8V option)
V
CC
= 1.8V
V
IN
= V
CC
or V
SS
0.2
µ
A
V
CC
= 3.6V 2.0
I
SB2
Standby Current
(2.7V option)
V
CC
= 2.7V
V
IN
= V
CC
or V
SS
0.5
µ
A
V
CC
= 5.5V 6.0
I
SB3
Standby Current
(5.0V option)
V
CC
= 4.5 - 5.5V V
IN
= V
CC
or V
SS
6.0
µ
A
I
LI
Input Leakage Current V
IN
= V
CC
or
V
SS
0.10 3.0
µ
A
I
LO
Output Leakage Current V
OUT
= V
CC
or
V
SS
0.05 3.0
µ
A
V
IL
Input Low Level
(Note:)
-0.6 V
CC
x 0.3 V
V
IH
Input High Level
(Note:)
V
CC
x 0.7 V
CC
+ 0.5 V
V
OL2
Output Low Level V
CC
= 3.0V I
OL
= 2.1 mA 0.4 V
V
OL1
Output Low Level V
CC
= 1.8V I
OL
= 0.15 mA 0.2 V
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