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AT24C16BN-SH-B

Part # AT24C16BN-SH-B
Description IC EEPROM 16KBIT 1MHZ 8SOIC
Category IC
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1 + $0.50965
Manufacturer Available Qty
Atmel
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

10
5175D–SEEPR–6/08
AT24C16B
10. Read Operations
Rea d operations are initiated the same way as write operations with the exception that the
read/write select bit in the device address word is set to one. There are three read operations:
current address read, random address read and sequential read.
CURRENT ADDRESS READ: The internal data word address counter ma intains the last
address accessed during the last read or write operation, incremented by one. This address
stays valid between operations as long as the chip power is maintained. The address “roll over”
during read is from the l
ast byte of the last memory page to the first byte of the first page. The
address “roll over” during write is from the last byte of the current page to the first byte of the
same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged
by the EEPROM, the current address data word is serially clocked out. The microcontroller does
not respond with an input zero but does generate a following stop condition (see Figure 10-4 on
page 11).
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data
word address. Once the device address word and data word address are clocked in and
acknowledged by the EEPROM, the microcontroller must generate
another start condition. The
microcontroller now initiates a current address read by sending a device address with the
read/write select bit high. The EEPROM acknowledges the device address and serially clocks
out the data word. The microcontroller does not respond with a zero but does generate a follow-
ing stop condition (see Figure 10-5 on page 12).
SEQUENTIAL READ: Sequential reads are initiated b y either a current address read or a ran-
dom address read. After the microcontroller receives a data word, it responds with an
acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment
the data word
address and serially clock out sequential data words. When the memory address
limit is reached, the data word address will “roll over” and the sequential read will continue. The
sequential read operation is terminated when the microcontroller does not respond with a zero
but does generate a following stop condition (see Figure 10-6 on page 12).
Figure 10-1. Device Address
16
MSB
PPP
2
10
11
5175D–SEEPR–6/08
AT24C16B
Figure 10-2. Byte Write
Figure 10-3. Page Write
Figure 10-4. Current Address Read
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AT24C16B
Figure 10-5. Random Read
Figure 10-6. Sequential Read
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